From 46ad3561be0b820333a515941bfb220591402573 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Nicolai=20H=C3=A4hnle?= Date: Fri, 6 May 2016 12:34:25 -0500 Subject: [PATCH] radeon/winsys: add cs_check_space MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Marek Olšák --- src/gallium/drivers/radeon/radeon_winsys.h | 9 +++++++++ src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 7 +++++++ src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 7 +++++++ 3 files changed, 23 insertions(+) diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index 792bacb5499..e8e429abc11 100644 --- a/src/gallium/drivers/radeon/radeon_winsys.h +++ b/src/gallium/drivers/radeon/radeon_winsys.h @@ -673,6 +673,15 @@ struct radeon_winsys { */ boolean (*cs_validate)(struct radeon_winsys_cs *cs); + /** + * Check whether the given number of dwords is available in the IB. + * Optionally chain a new chunk of the IB if necessary and supported. + * + * \param cs A command stream. + * \param dw Number of CS dwords requested by the caller. + */ + bool (*cs_check_space)(struct radeon_winsys_cs *cs, unsigned dw); + /** * Return TRUE if there is enough memory in VRAM and GTT for the buffers * added so far. diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index c8ce34de34d..639ffb5ce7c 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c @@ -603,6 +603,12 @@ static boolean amdgpu_cs_validate(struct radeon_winsys_cs *rcs) return TRUE; } +static bool amdgpu_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw) +{ + assert(rcs->cdw <= rcs->max_dw); + return rcs->max_dw - rcs->cdw >= dw; +} + static boolean amdgpu_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64_t vram, uint64_t gtt) { struct amdgpu_cs *cs = amdgpu_cs(rcs); @@ -941,6 +947,7 @@ void amdgpu_cs_init_functions(struct amdgpu_winsys *ws) ws->base.cs_add_buffer = amdgpu_cs_add_buffer; ws->base.cs_lookup_buffer = amdgpu_cs_lookup_buffer; ws->base.cs_validate = amdgpu_cs_validate; + ws->base.cs_check_space = amdgpu_cs_check_space; ws->base.cs_memory_below_limit = amdgpu_cs_memory_below_limit; ws->base.cs_query_memory_usage = amdgpu_cs_query_memory_usage; ws->base.cs_get_buffer_list = amdgpu_cs_get_buffer_list; diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c index acf16f2bfbb..a6ca37744dc 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c @@ -383,6 +383,12 @@ static boolean radeon_drm_cs_validate(struct radeon_winsys_cs *rcs) return status; } +static bool radeon_drm_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw) +{ + assert(rcs->cdw <= rcs->max_dw); + return rcs->max_dw - rcs->cdw >= dw; +} + static boolean radeon_drm_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64_t vram, uint64_t gtt) { struct radeon_drm_cs *cs = radeon_drm_cs(rcs); @@ -677,6 +683,7 @@ void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws) ws->base.cs_add_buffer = radeon_drm_cs_add_buffer; ws->base.cs_lookup_buffer = radeon_drm_cs_lookup_buffer; ws->base.cs_validate = radeon_drm_cs_validate; + ws->base.cs_check_space = radeon_drm_cs_check_space; ws->base.cs_memory_below_limit = radeon_drm_cs_memory_below_limit; ws->base.cs_query_memory_usage = radeon_drm_cs_query_memory_usage; ws->base.cs_get_buffer_list = radeon_drm_cs_get_buffer_list; -- 2.30.2