From 479ca6a895bc7c3304889fcbe0f315eac6fabe50 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sun, 16 Feb 2020 23:47:36 -0800 Subject: [PATCH] arm: Delete authors lists from the arm files. Change-Id: I6e9f5b70faebe5d279bff303c42f59a00a7845ec Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25447 Reviewed-by: Bobby R. Bruce Maintainer: Bobby R. Bruce Tested-by: kokoro --- src/arch/arm/ArmISA.py | 3 --- src/arch/arm/ArmInterrupts.py | 2 -- src/arch/arm/ArmNativeTrace.py | 2 -- src/arch/arm/ArmPMU.py | 3 --- src/arch/arm/ArmSemihosting.py | 2 -- src/arch/arm/ArmSystem.py | 3 --- src/arch/arm/ArmTLB.py | 2 -- src/arch/arm/SConscript | 3 --- src/arch/arm/SConsopts | 2 -- src/arch/arm/ccregs.hh | 3 +-- src/arch/arm/decoder.cc | 2 -- src/arch/arm/decoder.hh | 2 -- src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py | 2 -- src/arch/arm/fastmodel/CortexA76/SConscript | 2 -- src/arch/arm/fastmodel/CortexA76/cortex_a76.cc | 2 -- src/arch/arm/fastmodel/CortexA76/cortex_a76.hh | 2 -- src/arch/arm/fastmodel/CortexA76/evs.cc | 2 -- src/arch/arm/fastmodel/CortexA76/evs.hh | 2 -- src/arch/arm/fastmodel/CortexA76/thread_context.cc | 2 -- src/arch/arm/fastmodel/CortexA76/thread_context.hh | 2 -- src/arch/arm/fastmodel/CortexA76/x1/x1.lisa | 2 -- src/arch/arm/fastmodel/CortexA76/x2/x2.lisa | 2 -- src/arch/arm/fastmodel/CortexA76/x3/x3.lisa | 2 -- src/arch/arm/fastmodel/CortexA76/x4/x4.lisa | 2 -- src/arch/arm/fastmodel/FastModel.py | 2 -- src/arch/arm/fastmodel/GIC/FastModelGIC.py | 2 -- src/arch/arm/fastmodel/GIC/GIC.lisa | 3 --- src/arch/arm/fastmodel/GIC/SConscript | 2 -- src/arch/arm/fastmodel/GIC/gic.cc | 2 -- src/arch/arm/fastmodel/GIC/gic.hh | 2 -- src/arch/arm/fastmodel/SConscript | 2 -- src/arch/arm/fastmodel/SConsopts | 2 -- src/arch/arm/fastmodel/amba_from_tlm_bridge.cc | 2 -- src/arch/arm/fastmodel/amba_from_tlm_bridge.hh | 2 -- src/arch/arm/fastmodel/amba_ports.hh | 2 -- src/arch/arm/fastmodel/amba_to_tlm_bridge.cc | 2 -- src/arch/arm/fastmodel/amba_to_tlm_bridge.hh | 2 -- src/arch/arm/fastmodel/arm_fast_model.py | 2 -- src/arch/arm/fastmodel/common/signal_receiver.hh | 2 -- src/arch/arm/fastmodel/fastmodel.cc | 2 -- src/arch/arm/fastmodel/iris/Iris.py | 2 -- src/arch/arm/fastmodel/iris/SConscript | 2 -- src/arch/arm/fastmodel/iris/cpu.cc | 2 -- src/arch/arm/fastmodel/iris/cpu.hh | 2 -- src/arch/arm/fastmodel/iris/memory_spaces.hh | 2 -- src/arch/arm/fastmodel/iris/thread_context.cc | 2 -- src/arch/arm/fastmodel/iris/thread_context.hh | 2 -- src/arch/arm/fastmodel/iris/tlb.cc | 2 -- src/arch/arm/fastmodel/iris/tlb.hh | 2 -- .../fastmodel/protocol/ExportedClockRateControlProtocol.lisa | 2 -- src/arch/arm/fastmodel/protocol/SConscript | 2 -- src/arch/arm/fastmodel/protocol/SignalInterruptProtocol.lisa | 2 -- .../arm/fastmodel/protocol/exported_clock_rate_control.hh | 2 -- src/arch/arm/fastmodel/protocol/signal_interrupt.hh | 2 -- src/arch/arm/faults.cc | 5 ----- src/arch/arm/faults.hh | 5 ----- src/arch/arm/insts/branch.cc | 2 -- src/arch/arm/insts/branch.hh | 3 +-- src/arch/arm/insts/branch64.cc | 2 -- src/arch/arm/insts/branch64.hh | 3 +-- src/arch/arm/insts/crypto.cc | 3 --- src/arch/arm/insts/crypto.hh | 3 --- src/arch/arm/insts/data64.cc | 2 -- src/arch/arm/insts/data64.hh | 3 +-- src/arch/arm/insts/fplib.cc | 4 +--- src/arch/arm/insts/fplib.hh | 3 --- src/arch/arm/insts/macromem.cc | 2 -- src/arch/arm/insts/macromem.hh | 3 +-- src/arch/arm/insts/mem.cc | 2 -- src/arch/arm/insts/mem.hh | 3 +-- src/arch/arm/insts/mem64.cc | 2 -- src/arch/arm/insts/mem64.hh | 3 +-- src/arch/arm/insts/misc.cc | 2 -- src/arch/arm/insts/misc.hh | 2 -- src/arch/arm/insts/misc64.cc | 3 --- src/arch/arm/insts/misc64.hh | 3 --- src/arch/arm/insts/mult.hh | 3 +-- src/arch/arm/insts/neon64_mem.hh | 3 --- src/arch/arm/insts/pred_inst.cc | 2 -- src/arch/arm/insts/pred_inst.hh | 3 +-- src/arch/arm/insts/pseudo.cc | 3 --- src/arch/arm/insts/pseudo.hh | 3 --- src/arch/arm/insts/static_inst.cc | 2 -- src/arch/arm/insts/static_inst.hh | 3 +-- src/arch/arm/insts/sve.cc | 2 -- src/arch/arm/insts/sve.hh | 2 -- src/arch/arm/insts/sve_macromem.hh | 2 -- src/arch/arm/insts/sve_mem.cc | 2 -- src/arch/arm/insts/sve_mem.hh | 2 -- src/arch/arm/insts/vfp.cc | 2 -- src/arch/arm/insts/vfp.hh | 2 -- src/arch/arm/interrupts.cc | 2 -- src/arch/arm/interrupts.hh | 2 -- src/arch/arm/intregs.hh | 2 -- src/arch/arm/isa.cc | 3 --- src/arch/arm/isa.hh | 2 -- src/arch/arm/isa/bitfields.isa | 2 -- src/arch/arm/isa/copyright.txt | 2 -- src/arch/arm/isa/decoder/aarch64.isa | 2 -- src/arch/arm/isa/decoder/arm.isa | 2 -- src/arch/arm/isa/decoder/decoder.isa | 2 -- src/arch/arm/isa/decoder/thumb.isa | 2 -- src/arch/arm/isa/formats/aarch64.isa | 5 ----- src/arch/arm/isa/formats/basic.isa | 2 -- src/arch/arm/isa/formats/branch.isa | 2 -- src/arch/arm/isa/formats/breakpoint.isa | 2 -- src/arch/arm/isa/formats/crypto64.isa | 2 -- src/arch/arm/isa/formats/data.isa | 2 -- src/arch/arm/isa/formats/formats.isa | 2 -- src/arch/arm/isa/formats/fp.isa | 2 -- src/arch/arm/isa/formats/m5ops.isa | 2 -- src/arch/arm/isa/formats/macromem.isa | 2 -- src/arch/arm/isa/formats/mem.isa | 2 -- src/arch/arm/isa/formats/misc.isa | 3 --- src/arch/arm/isa/formats/mult.isa | 2 -- src/arch/arm/isa/formats/neon64.isa | 3 --- src/arch/arm/isa/formats/pred.isa | 2 -- src/arch/arm/isa/formats/pseudo.isa | 3 --- src/arch/arm/isa/formats/sve_2nd_level.isa | 2 -- src/arch/arm/isa/formats/sve_top_level.isa | 2 -- src/arch/arm/isa/formats/uncond.isa | 2 -- src/arch/arm/isa/includes.isa | 2 -- src/arch/arm/isa/insts/aarch64.isa | 2 -- src/arch/arm/isa/insts/amo64.isa | 2 -- src/arch/arm/isa/insts/branch.isa | 2 -- src/arch/arm/isa/insts/branch64.isa | 3 --- src/arch/arm/isa/insts/crypto.isa | 3 --- src/arch/arm/isa/insts/crypto64.isa | 4 ---- src/arch/arm/isa/insts/data.isa | 2 -- src/arch/arm/isa/insts/data64.isa | 2 -- src/arch/arm/isa/insts/div.isa | 2 -- src/arch/arm/isa/insts/fp.isa | 2 -- src/arch/arm/isa/insts/fp64.isa | 3 --- src/arch/arm/isa/insts/insts.isa | 2 -- src/arch/arm/isa/insts/ldr.isa | 2 -- src/arch/arm/isa/insts/ldr64.isa | 2 -- src/arch/arm/isa/insts/m5ops.isa | 2 -- src/arch/arm/isa/insts/macromem.isa | 3 --- src/arch/arm/isa/insts/mem.isa | 2 -- src/arch/arm/isa/insts/misc.isa | 2 -- src/arch/arm/isa/insts/misc64.isa | 2 -- src/arch/arm/isa/insts/mult.isa | 2 -- src/arch/arm/isa/insts/neon.isa | 2 -- src/arch/arm/isa/insts/neon64.isa | 3 --- src/arch/arm/isa/insts/neon64_mem.isa | 3 --- src/arch/arm/isa/insts/pauth.isa | 2 -- src/arch/arm/isa/insts/str.isa | 2 -- src/arch/arm/isa/insts/str64.isa | 2 -- src/arch/arm/isa/insts/sve.isa | 2 -- src/arch/arm/isa/insts/sve_mem.isa | 2 -- src/arch/arm/isa/main.isa | 2 -- src/arch/arm/isa/operands.isa | 2 -- src/arch/arm/isa/templates/basic.isa | 2 -- src/arch/arm/isa/templates/branch.isa | 2 -- src/arch/arm/isa/templates/branch64.isa | 2 -- src/arch/arm/isa/templates/crypto.isa | 2 -- src/arch/arm/isa/templates/data64.isa | 2 -- src/arch/arm/isa/templates/macromem.isa | 3 --- src/arch/arm/isa/templates/mem.isa | 2 -- src/arch/arm/isa/templates/mem64.isa | 2 -- src/arch/arm/isa/templates/misc.isa | 2 -- src/arch/arm/isa/templates/misc64.isa | 2 -- src/arch/arm/isa/templates/mult.isa | 2 -- src/arch/arm/isa/templates/neon.isa | 2 -- src/arch/arm/isa/templates/neon64.isa | 3 --- src/arch/arm/isa/templates/pred.isa | 2 -- src/arch/arm/isa/templates/semihost.isa | 2 -- src/arch/arm/isa/templates/sve.isa | 2 -- src/arch/arm/isa/templates/sve_mem.isa | 2 -- src/arch/arm/isa/templates/templates.isa | 2 -- src/arch/arm/isa/templates/vfp.isa | 2 -- src/arch/arm/isa/templates/vfp64.isa | 2 -- src/arch/arm/isa_device.cc | 2 -- src/arch/arm/isa_device.hh | 2 -- src/arch/arm/isa_traits.hh | 3 --- src/arch/arm/kernel_stats.hh | 2 -- src/arch/arm/kvm/ArmKvmCPU.py | 2 -- src/arch/arm/kvm/ArmV8KvmCPU.py | 2 -- src/arch/arm/kvm/BaseArmKvmCPU.py | 2 -- src/arch/arm/kvm/KvmGic.py | 2 -- src/arch/arm/kvm/SConscript | 2 -- src/arch/arm/kvm/arm_cpu.cc | 2 -- src/arch/arm/kvm/arm_cpu.hh | 2 -- src/arch/arm/kvm/armv8_cpu.cc | 2 -- src/arch/arm/kvm/armv8_cpu.hh | 2 -- src/arch/arm/kvm/base_cpu.cc | 2 -- src/arch/arm/kvm/base_cpu.hh | 2 -- src/arch/arm/kvm/gic.cc | 3 --- src/arch/arm/kvm/gic.hh | 3 --- src/arch/arm/linux/atag.hh | 2 -- src/arch/arm/linux/linux.cc | 2 -- src/arch/arm/linux/linux.hh | 3 --- src/arch/arm/linux/process.cc | 5 ----- src/arch/arm/linux/process.hh | 2 -- src/arch/arm/linux/system.cc | 2 -- src/arch/arm/linux/system.hh | 2 -- src/arch/arm/locked_mem.hh | 4 ---- src/arch/arm/microcode_rom.hh | 2 -- src/arch/arm/miscregs.cc | 4 ---- src/arch/arm/miscregs.hh | 4 +--- src/arch/arm/miscregs_types.hh | 3 --- src/arch/arm/mmapped_ipr.hh | 3 --- src/arch/arm/nativetrace.cc | 2 -- src/arch/arm/nativetrace.hh | 2 -- src/arch/arm/pagetable.hh | 2 -- src/arch/arm/pauth_helpers.cc | 2 -- src/arch/arm/pauth_helpers.hh | 2 -- src/arch/arm/pmu.cc | 5 ----- src/arch/arm/pmu.hh | 5 +---- src/arch/arm/process.cc | 3 --- src/arch/arm/process.hh | 2 -- src/arch/arm/pseudo_inst.hh | 2 -- src/arch/arm/qarma.cc | 2 -- src/arch/arm/qarma.hh | 2 -- src/arch/arm/registers.hh | 2 -- src/arch/arm/remote_gdb.cc | 4 ---- src/arch/arm/remote_gdb.hh | 4 ---- src/arch/arm/semihosting.cc | 2 -- src/arch/arm/semihosting.hh | 3 +-- src/arch/arm/stacktrace.cc | 2 -- src/arch/arm/stacktrace.hh | 2 -- src/arch/arm/stage2_lookup.cc | 3 --- src/arch/arm/stage2_lookup.hh | 3 --- src/arch/arm/stage2_mmu.cc | 2 -- src/arch/arm/stage2_mmu.hh | 2 -- src/arch/arm/system.cc | 2 -- src/arch/arm/system.hh | 2 -- src/arch/arm/table_walker.cc | 3 --- src/arch/arm/table_walker.hh | 3 --- src/arch/arm/tlb.cc | 4 ---- src/arch/arm/tlb.hh | 2 -- src/arch/arm/tlbi_op.cc | 2 -- src/arch/arm/tlbi_op.hh | 2 -- src/arch/arm/tracers/SConscript | 3 --- src/arch/arm/tracers/TarmacTrace.py | 3 --- src/arch/arm/tracers/tarmac_base.cc | 2 -- src/arch/arm/tracers/tarmac_base.hh | 3 --- src/arch/arm/tracers/tarmac_parser.cc | 2 -- src/arch/arm/tracers/tarmac_parser.hh | 2 -- src/arch/arm/tracers/tarmac_record.cc | 2 -- src/arch/arm/tracers/tarmac_record.hh | 2 -- src/arch/arm/tracers/tarmac_record_v8.cc | 2 -- src/arch/arm/tracers/tarmac_record_v8.hh | 2 -- src/arch/arm/tracers/tarmac_tracer.cc | 2 -- src/arch/arm/tracers/tarmac_tracer.hh | 2 -- src/arch/arm/types.hh | 2 -- src/arch/arm/utility.cc | 2 -- src/arch/arm/utility.hh | 3 --- src/arch/arm/vtophys.cc | 4 ---- src/arch/arm/vtophys.hh | 4 ---- 250 files changed, 14 insertions(+), 575 deletions(-) diff --git a/src/arch/arm/ArmISA.py b/src/arch/arm/ArmISA.py index f796fd551..0d917058c 100644 --- a/src/arch/arm/ArmISA.py +++ b/src/arch/arm/ArmISA.py @@ -32,9 +32,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Andreas Sandberg -# Giacomo Gabrielli from m5.params import * from m5.proxy import * diff --git a/src/arch/arm/ArmInterrupts.py b/src/arch/arm/ArmInterrupts.py index 9a6b546a5..aec7a28c8 100644 --- a/src/arch/arm/ArmInterrupts.py +++ b/src/arch/arm/ArmInterrupts.py @@ -23,8 +23,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Ali Saidi from m5.objects.BaseInterrupts import BaseInterrupts diff --git a/src/arch/arm/ArmNativeTrace.py b/src/arch/arm/ArmNativeTrace.py index 53ee04a8b..f01647ada 100644 --- a/src/arch/arm/ArmNativeTrace.py +++ b/src/arch/arm/ArmNativeTrace.py @@ -23,8 +23,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Gabe Black from m5.SimObject import SimObject from m5.params import * diff --git a/src/arch/arm/ArmPMU.py b/src/arch/arm/ArmPMU.py index be9dbb86e..ed4f39018 100644 --- a/src/arch/arm/ArmPMU.py +++ b/src/arch/arm/ArmPMU.py @@ -33,9 +33,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Matt Horsnell -# Andreas Sandberg from m5.defines import buildEnv from m5.SimObject import * diff --git a/src/arch/arm/ArmSemihosting.py b/src/arch/arm/ArmSemihosting.py index 6052f1d6b..e4455900b 100644 --- a/src/arch/arm/ArmSemihosting.py +++ b/src/arch/arm/ArmSemihosting.py @@ -32,8 +32,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Andreas Sandberg from m5.params import * from m5.SimObject import * diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py index 0e642153b..5f4061feb 100644 --- a/src/arch/arm/ArmSystem.py +++ b/src/arch/arm/ArmSystem.py @@ -32,9 +32,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Ali Saidi -# Glenn Bergmans from m5.params import * from m5.options import * diff --git a/src/arch/arm/ArmTLB.py b/src/arch/arm/ArmTLB.py index d2334630e..721d0623a 100644 --- a/src/arch/arm/ArmTLB.py +++ b/src/arch/arm/ArmTLB.py @@ -34,8 +34,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Ali Saidi from m5.SimObject import SimObject from m5.params import * diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript index 8e00ba966..b4e9bba8e 100644 --- a/src/arch/arm/SConscript +++ b/src/arch/arm/SConscript @@ -37,9 +37,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Stephen Hines -# Ali Saidi Import('*') diff --git a/src/arch/arm/SConsopts b/src/arch/arm/SConsopts index fd9516929..020e4995a 100644 --- a/src/arch/arm/SConsopts +++ b/src/arch/arm/SConsopts @@ -25,8 +25,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Stephen Hines Import('*') diff --git a/src/arch/arm/ccregs.hh b/src/arch/arm/ccregs.hh index 1818d9bce..94a605c57 100644 --- a/src/arch/arm/ccregs.hh +++ b/src/arch/arm/ccregs.hh @@ -33,9 +33,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Curtis Dunham */ + #ifndef __ARCH_ARM_CCREGS_HH__ #define __ARCH_ARM_CCREGS_HH__ diff --git a/src/arch/arm/decoder.cc b/src/arch/arm/decoder.cc index 4638aef2d..8f37e63db 100644 --- a/src/arch/arm/decoder.cc +++ b/src/arch/arm/decoder.cc @@ -36,8 +36,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/decoder.hh" diff --git a/src/arch/arm/decoder.hh b/src/arch/arm/decoder.hh index 74e92ca52..774aedd4e 100644 --- a/src/arch/arm/decoder.hh +++ b/src/arch/arm/decoder.hh @@ -36,8 +36,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_DECODER_HH__ diff --git a/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py b/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py index 4a0c2a362..68ab7214d 100644 --- a/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py +++ b/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py @@ -22,8 +22,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Gabe Black from m5.params import * from m5.proxy import * diff --git a/src/arch/arm/fastmodel/CortexA76/SConscript b/src/arch/arm/fastmodel/CortexA76/SConscript index df3fe718e..883e0aec2 100644 --- a/src/arch/arm/fastmodel/CortexA76/SConscript +++ b/src/arch/arm/fastmodel/CortexA76/SConscript @@ -22,8 +22,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Gabe Black Import('*') diff --git a/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc b/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc index cd0435937..c723f60a7 100644 --- a/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc +++ b/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/fastmodel/CortexA76/cortex_a76.hh" diff --git a/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh b/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh index 7f92d2580..acbae89cc 100644 --- a/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh +++ b/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_CORTEXA76_CORETEX_A76_HH__ diff --git a/src/arch/arm/fastmodel/CortexA76/evs.cc b/src/arch/arm/fastmodel/CortexA76/evs.cc index 27f63649f..ddeec3ad3 100644 --- a/src/arch/arm/fastmodel/CortexA76/evs.cc +++ b/src/arch/arm/fastmodel/CortexA76/evs.cc @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/fastmodel/CortexA76/evs.hh" diff --git a/src/arch/arm/fastmodel/CortexA76/evs.hh b/src/arch/arm/fastmodel/CortexA76/evs.hh index b33ba2854..365780835 100644 --- a/src/arch/arm/fastmodel/CortexA76/evs.hh +++ b/src/arch/arm/fastmodel/CortexA76/evs.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_CORTEXA76_EVS_HH__ diff --git a/src/arch/arm/fastmodel/CortexA76/thread_context.cc b/src/arch/arm/fastmodel/CortexA76/thread_context.cc index 70a95ede1..6c4a4df30 100644 --- a/src/arch/arm/fastmodel/CortexA76/thread_context.cc +++ b/src/arch/arm/fastmodel/CortexA76/thread_context.cc @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/fastmodel/CortexA76/thread_context.hh" diff --git a/src/arch/arm/fastmodel/CortexA76/thread_context.hh b/src/arch/arm/fastmodel/CortexA76/thread_context.hh index a112cf011..8f833e572 100644 --- a/src/arch/arm/fastmodel/CortexA76/thread_context.hh +++ b/src/arch/arm/fastmodel/CortexA76/thread_context.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_CORTEXA76_THREAD_CONTEXT_HH__ diff --git a/src/arch/arm/fastmodel/CortexA76/x1/x1.lisa b/src/arch/arm/fastmodel/CortexA76/x1/x1.lisa index 942b178a6..1968931be 100644 --- a/src/arch/arm/fastmodel/CortexA76/x1/x1.lisa +++ b/src/arch/arm/fastmodel/CortexA76/x1/x1.lisa @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ component CortexA76x1 diff --git a/src/arch/arm/fastmodel/CortexA76/x2/x2.lisa b/src/arch/arm/fastmodel/CortexA76/x2/x2.lisa index 091ad1738..e0f7a9330 100644 --- a/src/arch/arm/fastmodel/CortexA76/x2/x2.lisa +++ b/src/arch/arm/fastmodel/CortexA76/x2/x2.lisa @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ component CortexA76x2 diff --git a/src/arch/arm/fastmodel/CortexA76/x3/x3.lisa b/src/arch/arm/fastmodel/CortexA76/x3/x3.lisa index a78678636..9ce9027e4 100644 --- a/src/arch/arm/fastmodel/CortexA76/x3/x3.lisa +++ b/src/arch/arm/fastmodel/CortexA76/x3/x3.lisa @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ component CortexA76x3 diff --git a/src/arch/arm/fastmodel/CortexA76/x4/x4.lisa b/src/arch/arm/fastmodel/CortexA76/x4/x4.lisa index 6926f491a..e4b79ce1b 100644 --- a/src/arch/arm/fastmodel/CortexA76/x4/x4.lisa +++ b/src/arch/arm/fastmodel/CortexA76/x4/x4.lisa @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ component CortexA76x4 diff --git a/src/arch/arm/fastmodel/FastModel.py b/src/arch/arm/fastmodel/FastModel.py index ccc5e2c49..5be451a88 100644 --- a/src/arch/arm/fastmodel/FastModel.py +++ b/src/arch/arm/fastmodel/FastModel.py @@ -22,8 +22,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Gabe Black from m5.params import * from m5.proxy import * diff --git a/src/arch/arm/fastmodel/GIC/FastModelGIC.py b/src/arch/arm/fastmodel/GIC/FastModelGIC.py index 72618b92d..d682e8594 100644 --- a/src/arch/arm/fastmodel/GIC/FastModelGIC.py +++ b/src/arch/arm/fastmodel/GIC/FastModelGIC.py @@ -22,8 +22,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Gabe Black from m5.params import * from m5.SimObject import SimObject diff --git a/src/arch/arm/fastmodel/GIC/GIC.lisa b/src/arch/arm/fastmodel/GIC/GIC.lisa index 7f00d7509..9e4d917a6 100644 --- a/src/arch/arm/fastmodel/GIC/GIC.lisa +++ b/src/arch/arm/fastmodel/GIC/GIC.lisa @@ -23,9 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black - * Chun-Chen TK Hsu */ component GIC diff --git a/src/arch/arm/fastmodel/GIC/SConscript b/src/arch/arm/fastmodel/GIC/SConscript index be5cbbded..94d205073 100644 --- a/src/arch/arm/fastmodel/GIC/SConscript +++ b/src/arch/arm/fastmodel/GIC/SConscript @@ -22,8 +22,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Gabe Black Import('*') diff --git a/src/arch/arm/fastmodel/GIC/gic.cc b/src/arch/arm/fastmodel/GIC/gic.cc index 8a7eb3b62..c1670455a 100644 --- a/src/arch/arm/fastmodel/GIC/gic.cc +++ b/src/arch/arm/fastmodel/GIC/gic.cc @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/fastmodel/GIC/gic.hh" diff --git a/src/arch/arm/fastmodel/GIC/gic.hh b/src/arch/arm/fastmodel/GIC/gic.hh index 24f0906ba..63698b94d 100644 --- a/src/arch/arm/fastmodel/GIC/gic.hh +++ b/src/arch/arm/fastmodel/GIC/gic.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_GIC_GIC_HH__ diff --git a/src/arch/arm/fastmodel/SConscript b/src/arch/arm/fastmodel/SConscript index 2cd577dcd..f5c039d08 100644 --- a/src/arch/arm/fastmodel/SConscript +++ b/src/arch/arm/fastmodel/SConscript @@ -22,8 +22,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Gabe Black from __future__ import print_function diff --git a/src/arch/arm/fastmodel/SConsopts b/src/arch/arm/fastmodel/SConsopts index 39e8a3f64..35e38952d 100644 --- a/src/arch/arm/fastmodel/SConsopts +++ b/src/arch/arm/fastmodel/SConsopts @@ -23,8 +23,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Gabe Black Import('*') diff --git a/src/arch/arm/fastmodel/amba_from_tlm_bridge.cc b/src/arch/arm/fastmodel/amba_from_tlm_bridge.cc index c8cbd8171..5ce494f15 100644 --- a/src/arch/arm/fastmodel/amba_from_tlm_bridge.cc +++ b/src/arch/arm/fastmodel/amba_from_tlm_bridge.cc @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/fastmodel/amba_from_tlm_bridge.hh" diff --git a/src/arch/arm/fastmodel/amba_from_tlm_bridge.hh b/src/arch/arm/fastmodel/amba_from_tlm_bridge.hh index efab110d7..98ff74df6 100644 --- a/src/arch/arm/fastmodel/amba_from_tlm_bridge.hh +++ b/src/arch/arm/fastmodel/amba_from_tlm_bridge.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_AMBA_FROM_TLM_BRIDGE_HH__ diff --git a/src/arch/arm/fastmodel/amba_ports.hh b/src/arch/arm/fastmodel/amba_ports.hh index a66a89600..b086eb4dc 100644 --- a/src/arch/arm/fastmodel/amba_ports.hh +++ b/src/arch/arm/fastmodel/amba_ports.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_AMBA_PORTS_HH__ diff --git a/src/arch/arm/fastmodel/amba_to_tlm_bridge.cc b/src/arch/arm/fastmodel/amba_to_tlm_bridge.cc index d811645d6..0835c0bbc 100644 --- a/src/arch/arm/fastmodel/amba_to_tlm_bridge.cc +++ b/src/arch/arm/fastmodel/amba_to_tlm_bridge.cc @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/fastmodel/amba_to_tlm_bridge.hh" diff --git a/src/arch/arm/fastmodel/amba_to_tlm_bridge.hh b/src/arch/arm/fastmodel/amba_to_tlm_bridge.hh index 805abc0b7..8baee6ad9 100644 --- a/src/arch/arm/fastmodel/amba_to_tlm_bridge.hh +++ b/src/arch/arm/fastmodel/amba_to_tlm_bridge.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_AMBA_TO_TLM_BRIDGE_HH__ diff --git a/src/arch/arm/fastmodel/arm_fast_model.py b/src/arch/arm/fastmodel/arm_fast_model.py index 2c19fe5bc..3b9c7cb5e 100644 --- a/src/arch/arm/fastmodel/arm_fast_model.py +++ b/src/arch/arm/fastmodel/arm_fast_model.py @@ -22,8 +22,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Gabe Black import os diff --git a/src/arch/arm/fastmodel/common/signal_receiver.hh b/src/arch/arm/fastmodel/common/signal_receiver.hh index 314812890..8af444bab 100644 --- a/src/arch/arm/fastmodel/common/signal_receiver.hh +++ b/src/arch/arm/fastmodel/common/signal_receiver.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_COMMON_SIGNAL_RECEIVER_HH__ diff --git a/src/arch/arm/fastmodel/fastmodel.cc b/src/arch/arm/fastmodel/fastmodel.cc index 4a66bbb81..27a39fcb2 100644 --- a/src/arch/arm/fastmodel/fastmodel.cc +++ b/src/arch/arm/fastmodel/fastmodel.cc @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "python/pybind11/pybind.hh" diff --git a/src/arch/arm/fastmodel/iris/Iris.py b/src/arch/arm/fastmodel/iris/Iris.py index cfd872851..696b54a99 100644 --- a/src/arch/arm/fastmodel/iris/Iris.py +++ b/src/arch/arm/fastmodel/iris/Iris.py @@ -22,8 +22,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Gabe Black from m5.params import * from m5.proxy import * diff --git a/src/arch/arm/fastmodel/iris/SConscript b/src/arch/arm/fastmodel/iris/SConscript index 66435d275..c8d822b89 100644 --- a/src/arch/arm/fastmodel/iris/SConscript +++ b/src/arch/arm/fastmodel/iris/SConscript @@ -22,8 +22,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Gabe Black Import('*') diff --git a/src/arch/arm/fastmodel/iris/cpu.cc b/src/arch/arm/fastmodel/iris/cpu.cc index 6c282b69a..7d31a9b86 100644 --- a/src/arch/arm/fastmodel/iris/cpu.cc +++ b/src/arch/arm/fastmodel/iris/cpu.cc @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/fastmodel/iris/cpu.hh" diff --git a/src/arch/arm/fastmodel/iris/cpu.hh b/src/arch/arm/fastmodel/iris/cpu.hh index 3b913b92d..3660dd38c 100644 --- a/src/arch/arm/fastmodel/iris/cpu.hh +++ b/src/arch/arm/fastmodel/iris/cpu.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_IRIS_CPU_HH__ diff --git a/src/arch/arm/fastmodel/iris/memory_spaces.hh b/src/arch/arm/fastmodel/iris/memory_spaces.hh index 026904c16..3840a76b6 100644 --- a/src/arch/arm/fastmodel/iris/memory_spaces.hh +++ b/src/arch/arm/fastmodel/iris/memory_spaces.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_IRIS_MEMORY_SPACES_HH__ diff --git a/src/arch/arm/fastmodel/iris/thread_context.cc b/src/arch/arm/fastmodel/iris/thread_context.cc index f3b4c95af..261491d45 100644 --- a/src/arch/arm/fastmodel/iris/thread_context.cc +++ b/src/arch/arm/fastmodel/iris/thread_context.cc @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/fastmodel/iris/thread_context.hh" diff --git a/src/arch/arm/fastmodel/iris/thread_context.hh b/src/arch/arm/fastmodel/iris/thread_context.hh index 84d1f79fd..9c7ed4ed8 100644 --- a/src/arch/arm/fastmodel/iris/thread_context.hh +++ b/src/arch/arm/fastmodel/iris/thread_context.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_IRIS_THREAD_CONTEXT_HH__ diff --git a/src/arch/arm/fastmodel/iris/tlb.cc b/src/arch/arm/fastmodel/iris/tlb.cc index bdf95e9c5..e99c679ef 100644 --- a/src/arch/arm/fastmodel/iris/tlb.cc +++ b/src/arch/arm/fastmodel/iris/tlb.cc @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/fastmodel/iris/tlb.hh" diff --git a/src/arch/arm/fastmodel/iris/tlb.hh b/src/arch/arm/fastmodel/iris/tlb.hh index 60904e31d..1d9c216bc 100644 --- a/src/arch/arm/fastmodel/iris/tlb.hh +++ b/src/arch/arm/fastmodel/iris/tlb.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_IRIS_TLB_HH__ diff --git a/src/arch/arm/fastmodel/protocol/ExportedClockRateControlProtocol.lisa b/src/arch/arm/fastmodel/protocol/ExportedClockRateControlProtocol.lisa index 141d04710..03195846a 100644 --- a/src/arch/arm/fastmodel/protocol/ExportedClockRateControlProtocol.lisa +++ b/src/arch/arm/fastmodel/protocol/ExportedClockRateControlProtocol.lisa @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ protocol ExportedClockRateControl diff --git a/src/arch/arm/fastmodel/protocol/SConscript b/src/arch/arm/fastmodel/protocol/SConscript index f82e04c2a..92ba89716 100644 --- a/src/arch/arm/fastmodel/protocol/SConscript +++ b/src/arch/arm/fastmodel/protocol/SConscript @@ -22,8 +22,6 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Gabe Black Depends('ExportedClockRateControlProtocol.lisa', 'exported_clock_rate_control.hh') diff --git a/src/arch/arm/fastmodel/protocol/SignalInterruptProtocol.lisa b/src/arch/arm/fastmodel/protocol/SignalInterruptProtocol.lisa index d8b9a6182..4665e0b67 100644 --- a/src/arch/arm/fastmodel/protocol/SignalInterruptProtocol.lisa +++ b/src/arch/arm/fastmodel/protocol/SignalInterruptProtocol.lisa @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ protocol SignalInterrupt diff --git a/src/arch/arm/fastmodel/protocol/exported_clock_rate_control.hh b/src/arch/arm/fastmodel/protocol/exported_clock_rate_control.hh index 4cedd00e3..aa5b6e998 100644 --- a/src/arch/arm/fastmodel/protocol/exported_clock_rate_control.hh +++ b/src/arch/arm/fastmodel/protocol/exported_clock_rate_control.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_PROTOCOL_EXPORTED_CLOCK_RATE_CONTROL_HH__ diff --git a/src/arch/arm/fastmodel/protocol/signal_interrupt.hh b/src/arch/arm/fastmodel/protocol/signal_interrupt.hh index 4cf047158..dc7f07f87 100644 --- a/src/arch/arm/fastmodel/protocol/signal_interrupt.hh +++ b/src/arch/arm/fastmodel/protocol/signal_interrupt.hh @@ -23,8 +23,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_FASTMODEL_PROTOCOL_SIGNAL_INTERRUPT_HH__ diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc index 9b42d0c33..22894f3ef 100644 --- a/src/arch/arm/faults.cc +++ b/src/arch/arm/faults.cc @@ -37,11 +37,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Ali Saidi - * Gabe Black - * Giacomo Gabrielli - * Thomas Grocutt */ #include "arch/arm/faults.hh" diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh index 508fd034e..1d8f782d7 100644 --- a/src/arch/arm/faults.hh +++ b/src/arch/arm/faults.hh @@ -37,11 +37,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Ali Saidi - * Gabe Black - * Giacomo Gabrielli - * Thomas Grocutt */ #ifndef __ARM_FAULTS_HH__ diff --git a/src/arch/arm/insts/branch.cc b/src/arch/arm/insts/branch.cc index 4de877e94..c9f2ce7d7 100644 --- a/src/arch/arm/insts/branch.cc +++ b/src/arch/arm/insts/branch.cc @@ -33,8 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Giacomo Travaglini */ #include "arch/arm/insts/branch.hh" diff --git a/src/arch/arm/insts/branch.hh b/src/arch/arm/insts/branch.hh index 9bc8cb8f7..b7bdcb9ea 100644 --- a/src/arch/arm/insts/branch.hh +++ b/src/arch/arm/insts/branch.hh @@ -36,9 +36,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Stephen Hines */ + #ifndef __ARCH_ARM_INSTS_BRANCH_HH__ #define __ARCH_ARM_INSTS_BRANCH_HH__ diff --git a/src/arch/arm/insts/branch64.cc b/src/arch/arm/insts/branch64.cc index 1c47b42f3..dd57a1afa 100644 --- a/src/arch/arm/insts/branch64.cc +++ b/src/arch/arm/insts/branch64.cc @@ -33,8 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/insts/branch64.hh" diff --git a/src/arch/arm/insts/branch64.hh b/src/arch/arm/insts/branch64.hh index 8bde1a05a..59f93e13d 100644 --- a/src/arch/arm/insts/branch64.hh +++ b/src/arch/arm/insts/branch64.hh @@ -33,9 +33,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ + #ifndef __ARCH_ARM_INSTS_BRANCH64_HH__ #define __ARCH_ARM_INSTS_BRANCH64_HH__ diff --git a/src/arch/arm/insts/crypto.cc b/src/arch/arm/insts/crypto.cc index 76f803c19..51e019a04 100644 --- a/src/arch/arm/insts/crypto.cc +++ b/src/arch/arm/insts/crypto.cc @@ -33,9 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Matt Horsnell - * Prakash Ramrakhyani */ #include diff --git a/src/arch/arm/insts/crypto.hh b/src/arch/arm/insts/crypto.hh index 021c519cd..cd3724393 100644 --- a/src/arch/arm/insts/crypto.hh +++ b/src/arch/arm/insts/crypto.hh @@ -33,9 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Matt Horsnell - * Prakash Ramrakhyani */ #ifndef __ARCH_ARM_INSTS_CRYPTO_HH__ diff --git a/src/arch/arm/insts/data64.cc b/src/arch/arm/insts/data64.cc index 2f4dc117b..fb8fb74cb 100644 --- a/src/arch/arm/insts/data64.cc +++ b/src/arch/arm/insts/data64.cc @@ -33,8 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/insts/data64.hh" diff --git a/src/arch/arm/insts/data64.hh b/src/arch/arm/insts/data64.hh index d423802b5..dfd91f72f 100644 --- a/src/arch/arm/insts/data64.hh +++ b/src/arch/arm/insts/data64.hh @@ -33,9 +33,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ + #ifndef __ARCH_ARM_INSTS_DATA64_HH__ #define __ARCH_ARM_INSTS_DATA64_HH__ diff --git a/src/arch/arm/insts/fplib.cc b/src/arch/arm/insts/fplib.cc index 460ca7c18..84ebe6d14 100644 --- a/src/arch/arm/insts/fplib.cc +++ b/src/arch/arm/insts/fplib.cc @@ -34,10 +34,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -* Authors: Edmund Grimley Evans -* Thomas Grocutt */ + #include #include diff --git a/src/arch/arm/insts/fplib.hh b/src/arch/arm/insts/fplib.hh index a90999d5d..ed149f7dd 100644 --- a/src/arch/arm/insts/fplib.hh +++ b/src/arch/arm/insts/fplib.hh @@ -34,9 +34,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Edmund Grimley Evans - * Thomas Grocutt */ /** diff --git a/src/arch/arm/insts/macromem.cc b/src/arch/arm/insts/macromem.cc index bff0d3e72..125e0f8ff 100644 --- a/src/arch/arm/insts/macromem.cc +++ b/src/arch/arm/insts/macromem.cc @@ -36,8 +36,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Stephen Hines */ #include "arch/arm/insts/macromem.hh" diff --git a/src/arch/arm/insts/macromem.hh b/src/arch/arm/insts/macromem.hh index b974e268e..b3ba76dd4 100644 --- a/src/arch/arm/insts/macromem.hh +++ b/src/arch/arm/insts/macromem.hh @@ -36,9 +36,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Stephen Hines */ + #ifndef __ARCH_ARM_MACROMEM_HH__ #define __ARCH_ARM_MACROMEM_HH__ diff --git a/src/arch/arm/insts/mem.cc b/src/arch/arm/insts/mem.cc index 9cc9af025..c594ba5b3 100644 --- a/src/arch/arm/insts/mem.cc +++ b/src/arch/arm/insts/mem.cc @@ -36,8 +36,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Stephen Hines */ #include "arch/arm/insts/mem.hh" diff --git a/src/arch/arm/insts/mem.hh b/src/arch/arm/insts/mem.hh index 0c82acfcf..55d29812a 100644 --- a/src/arch/arm/insts/mem.hh +++ b/src/arch/arm/insts/mem.hh @@ -36,9 +36,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Stephen Hines */ + #ifndef __ARCH_ARM_MEM_HH__ #define __ARCH_ARM_MEM_HH__ diff --git a/src/arch/arm/insts/mem64.cc b/src/arch/arm/insts/mem64.cc index 660e56e80..02489092f 100644 --- a/src/arch/arm/insts/mem64.cc +++ b/src/arch/arm/insts/mem64.cc @@ -33,8 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/insts/mem64.hh" diff --git a/src/arch/arm/insts/mem64.hh b/src/arch/arm/insts/mem64.hh index 0561dc60d..78477cebf 100644 --- a/src/arch/arm/insts/mem64.hh +++ b/src/arch/arm/insts/mem64.hh @@ -33,9 +33,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ + #ifndef __ARCH_ARM_MEM64_HH__ #define __ARCH_ARM_MEM64_HH__ diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc index b38aa8795..999edef78 100644 --- a/src/arch/arm/insts/misc.cc +++ b/src/arch/arm/insts/misc.cc @@ -34,8 +34,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/insts/misc.hh" diff --git a/src/arch/arm/insts/misc.hh b/src/arch/arm/insts/misc.hh index f1d09630f..5d9c23170 100644 --- a/src/arch/arm/insts/misc.hh +++ b/src/arch/arm/insts/misc.hh @@ -33,8 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_INSTS_MISC_HH__ diff --git a/src/arch/arm/insts/misc64.cc b/src/arch/arm/insts/misc64.cc index d42d0a123..0c4663664 100644 --- a/src/arch/arm/insts/misc64.cc +++ b/src/arch/arm/insts/misc64.cc @@ -33,9 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black - * Giacomo Travaglini */ #include "arch/arm/insts/misc64.hh" diff --git a/src/arch/arm/insts/misc64.hh b/src/arch/arm/insts/misc64.hh index 9f4a6aed4..0698b046e 100644 --- a/src/arch/arm/insts/misc64.hh +++ b/src/arch/arm/insts/misc64.hh @@ -33,9 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black - * Giacomo Travaglini */ #ifndef __ARCH_ARM_INSTS_MISC64_HH__ diff --git a/src/arch/arm/insts/mult.hh b/src/arch/arm/insts/mult.hh index 9548766b1..da0810100 100644 --- a/src/arch/arm/insts/mult.hh +++ b/src/arch/arm/insts/mult.hh @@ -33,9 +33,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ + #ifndef __ARCH_ARM_INSTS_MULT_HH__ #define __ARCH_ARM_INSTS_MULT_HH__ diff --git a/src/arch/arm/insts/neon64_mem.hh b/src/arch/arm/insts/neon64_mem.hh index 01ce1b624..166b6d15c 100644 --- a/src/arch/arm/insts/neon64_mem.hh +++ b/src/arch/arm/insts/neon64_mem.hh @@ -33,9 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Mbou Eyole - * Giacomo Gabrielli */ /// @file diff --git a/src/arch/arm/insts/pred_inst.cc b/src/arch/arm/insts/pred_inst.cc index 049c42f01..748b79a0a 100644 --- a/src/arch/arm/insts/pred_inst.cc +++ b/src/arch/arm/insts/pred_inst.cc @@ -36,8 +36,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Stephen Hines */ #include "arch/arm/insts/pred_inst.hh" diff --git a/src/arch/arm/insts/pred_inst.hh b/src/arch/arm/insts/pred_inst.hh index 38ff8adea..5d7dc9767 100644 --- a/src/arch/arm/insts/pred_inst.hh +++ b/src/arch/arm/insts/pred_inst.hh @@ -36,9 +36,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Stephen Hines */ + #ifndef __ARCH_ARM_INSTS_PREDINST_HH__ #define __ARCH_ARM_INSTS_PREDINST_HH__ diff --git a/src/arch/arm/insts/pseudo.cc b/src/arch/arm/insts/pseudo.cc index 83a7a5dcc..9a1c9ac7a 100644 --- a/src/arch/arm/insts/pseudo.cc +++ b/src/arch/arm/insts/pseudo.cc @@ -36,9 +36,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Andreas Sandberg - * Stephen Hines */ #include "arch/arm/insts/pseudo.hh" diff --git a/src/arch/arm/insts/pseudo.hh b/src/arch/arm/insts/pseudo.hh index c7ed08d30..defdf89c1 100644 --- a/src/arch/arm/insts/pseudo.hh +++ b/src/arch/arm/insts/pseudo.hh @@ -36,9 +36,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Andreas Sandberg - * Stephen Hines */ #ifndef __ARCH_ARM_INSTS_PSEUDO_HH__ diff --git a/src/arch/arm/insts/static_inst.cc b/src/arch/arm/insts/static_inst.cc index 644cafd85..020539d88 100644 --- a/src/arch/arm/insts/static_inst.cc +++ b/src/arch/arm/insts/static_inst.cc @@ -37,8 +37,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Stephen Hines */ #include "arch/arm/insts/static_inst.hh" diff --git a/src/arch/arm/insts/static_inst.hh b/src/arch/arm/insts/static_inst.hh index c58aca452..31a7d35d8 100644 --- a/src/arch/arm/insts/static_inst.hh +++ b/src/arch/arm/insts/static_inst.hh @@ -36,9 +36,8 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Stephen Hines */ + #ifndef __ARCH_ARM_INSTS_STATICINST_HH__ #define __ARCH_ARM_INSTS_STATICINST_HH__ diff --git a/src/arch/arm/insts/sve.cc b/src/arch/arm/insts/sve.cc index 22ce47f93..ec0132fcb 100644 --- a/src/arch/arm/insts/sve.cc +++ b/src/arch/arm/insts/sve.cc @@ -33,8 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Giacomo Gabrielli */ // TODO: add support for suffixes of register specifiers in disasm strings. diff --git a/src/arch/arm/insts/sve.hh b/src/arch/arm/insts/sve.hh index f72e3ccd7..9ee59f8c1 100644 --- a/src/arch/arm/insts/sve.hh +++ b/src/arch/arm/insts/sve.hh @@ -33,8 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Giacomo Gabrielli */ #ifndef __ARCH_ARM_INSTS_SVE_HH__ diff --git a/src/arch/arm/insts/sve_macromem.hh b/src/arch/arm/insts/sve_macromem.hh index 861318122..eb1e33010 100644 --- a/src/arch/arm/insts/sve_macromem.hh +++ b/src/arch/arm/insts/sve_macromem.hh @@ -33,8 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Giacomo Gabrielli */ #ifndef __ARCH_ARM_SVE_MACROMEM_HH__ diff --git a/src/arch/arm/insts/sve_mem.cc b/src/arch/arm/insts/sve_mem.cc index 0f24d899b..466e4b945 100644 --- a/src/arch/arm/insts/sve_mem.cc +++ b/src/arch/arm/insts/sve_mem.cc @@ -33,8 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Giacomo Gabrielli */ #include "arch/arm/insts/sve_mem.hh" diff --git a/src/arch/arm/insts/sve_mem.hh b/src/arch/arm/insts/sve_mem.hh index de6b69cd5..7625374fb 100644 --- a/src/arch/arm/insts/sve_mem.hh +++ b/src/arch/arm/insts/sve_mem.hh @@ -33,8 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Giacomo Gabrielli */ #ifndef __ARCH_ARM_SVE_MEM_HH__ diff --git a/src/arch/arm/insts/vfp.cc b/src/arch/arm/insts/vfp.cc index 7056f8491..bafca4338 100644 --- a/src/arch/arm/insts/vfp.cc +++ b/src/arch/arm/insts/vfp.cc @@ -33,8 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include "arch/arm/insts/vfp.hh" diff --git a/src/arch/arm/insts/vfp.hh b/src/arch/arm/insts/vfp.hh index d7a072408..5eb681f7d 100644 --- a/src/arch/arm/insts/vfp.hh +++ b/src/arch/arm/insts/vfp.hh @@ -33,8 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_INSTS_VFP_HH__ diff --git a/src/arch/arm/interrupts.cc b/src/arch/arm/interrupts.cc index e2febb35e..02f1e6df3 100644 --- a/src/arch/arm/interrupts.cc +++ b/src/arch/arm/interrupts.cc @@ -33,8 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Ali Saidi */ #include "arch/arm/interrupts.hh" diff --git a/src/arch/arm/interrupts.hh b/src/arch/arm/interrupts.hh index 1f8e321cd..e365a00e5 100644 --- a/src/arch/arm/interrupts.hh +++ b/src/arch/arm/interrupts.hh @@ -36,8 +36,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Ali Saidi */ #ifndef __ARCH_ARM_INTERRUPT_HH__ diff --git a/src/arch/arm/intregs.hh b/src/arch/arm/intregs.hh index d92f58fc4..7dd7914c9 100644 --- a/src/arch/arm/intregs.hh +++ b/src/arch/arm/intregs.hh @@ -36,8 +36,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #include diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc index ed90b0e90..f6faf5b04 100644 --- a/src/arch/arm/isa.cc +++ b/src/arch/arm/isa.cc @@ -33,9 +33,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black - * Ali Saidi */ #include "arch/arm/isa.hh" diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh index 901619666..e6173cf62 100644 --- a/src/arch/arm/isa.hh +++ b/src/arch/arm/isa.hh @@ -36,8 +36,6 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black */ #ifndef __ARCH_ARM_ISA_HH__ diff --git a/src/arch/arm/isa/bitfields.isa b/src/arch/arm/isa/bitfields.isa index ac6989a33..903bb6787 100644 --- a/src/arch/arm/isa/bitfields.isa +++ b/src/arch/arm/isa/bitfields.isa @@ -37,8 +37,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Stephen Hines //////////////////////////////////////////////////////////////////// // diff --git a/src/arch/arm/isa/copyright.txt b/src/arch/arm/isa/copyright.txt index c97197393..899a8df8b 100644 --- a/src/arch/arm/isa/copyright.txt +++ b/src/arch/arm/isa/copyright.txt @@ -35,6 +35,4 @@ // ARISING OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE, EVEN // IF IT HAS BEEN OR IS HEREAFTER ADVISED OF THE POSSIBILITY OF SUCH // DAMAGES. -// -// Authors: Stephen R. Hines - modified for use in ARM version diff --git a/src/arch/arm/isa/decoder/aarch64.isa b/src/arch/arm/isa/decoder/aarch64.isa index a6c0fa2df..f2f096482 100644 --- a/src/arch/arm/isa/decoder/aarch64.isa +++ b/src/arch/arm/isa/decoder/aarch64.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black //////////////////////////////////////////////////////////////////// // diff --git a/src/arch/arm/isa/decoder/arm.isa b/src/arch/arm/isa/decoder/arm.isa index 1a32ce6b6..838e27b3d 100644 --- a/src/arch/arm/isa/decoder/arm.isa +++ b/src/arch/arm/isa/decoder/arm.isa @@ -37,8 +37,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Stephen Hines //////////////////////////////////////////////////////////////////// // diff --git a/src/arch/arm/isa/decoder/decoder.isa b/src/arch/arm/isa/decoder/decoder.isa index 1c9acbebc..184150579 100644 --- a/src/arch/arm/isa/decoder/decoder.isa +++ b/src/arch/arm/isa/decoder/decoder.isa @@ -37,8 +37,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black decode ILLEGALEXEC default IllegalExec::illegalExec() { 0: decode DECODERFAULT default DecoderFault::decoderFault() { diff --git a/src/arch/arm/isa/decoder/thumb.isa b/src/arch/arm/isa/decoder/thumb.isa index 31495793e..7f04ef348 100644 --- a/src/arch/arm/isa/decoder/thumb.isa +++ b/src/arch/arm/isa/decoder/thumb.isa @@ -37,8 +37,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black decode BIGTHUMB { // 16 bit thumb instructions. diff --git a/src/arch/arm/isa/formats/aarch64.isa b/src/arch/arm/isa/formats/aarch64.isa index 2462cdb25..23b234a67 100644 --- a/src/arch/arm/isa/formats/aarch64.isa +++ b/src/arch/arm/isa/formats/aarch64.isa @@ -32,11 +32,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black -// Thomas Grocutt -// Mbou Eyole -// Giacomo Gabrielli output header {{ namespace Aarch64 diff --git a/src/arch/arm/isa/formats/basic.isa b/src/arch/arm/isa/formats/basic.isa index 43ee37688..985fa6bdf 100644 --- a/src/arch/arm/isa/formats/basic.isa +++ b/src/arch/arm/isa/formats/basic.isa @@ -25,8 +25,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Stephen Hines // The most basic instruction format... def format BasicOp(code, *flags) {{ diff --git a/src/arch/arm/isa/formats/branch.isa b/src/arch/arm/isa/formats/branch.isa index 5f72113ae..b7360fc94 100644 --- a/src/arch/arm/isa/formats/branch.isa +++ b/src/arch/arm/isa/formats/branch.isa @@ -37,8 +37,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Stephen Hines //////////////////////////////////////////////////////////////////// // diff --git a/src/arch/arm/isa/formats/breakpoint.isa b/src/arch/arm/isa/formats/breakpoint.isa index 67360f1b5..d94c943bc 100644 --- a/src/arch/arm/isa/formats/breakpoint.isa +++ b/src/arch/arm/isa/formats/breakpoint.isa @@ -37,8 +37,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Stephen Hines //////////////////////////////////////////////////////////////////// // diff --git a/src/arch/arm/isa/formats/crypto64.isa b/src/arch/arm/isa/formats/crypto64.isa index d155b0421..133b9c69c 100644 --- a/src/arch/arm/isa/formats/crypto64.isa +++ b/src/arch/arm/isa/formats/crypto64.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Giacomo Travaglini let {{ header_output = ''' diff --git a/src/arch/arm/isa/formats/data.isa b/src/arch/arm/isa/formats/data.isa index aaa0d34e7..a927f2b2d 100644 --- a/src/arch/arm/isa/formats/data.isa +++ b/src/arch/arm/isa/formats/data.isa @@ -32,8 +32,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black def format ArmMiscMedia() {{ decode_block = ''' diff --git a/src/arch/arm/isa/formats/formats.isa b/src/arch/arm/isa/formats/formats.isa index 935500dc2..0c1b217b8 100644 --- a/src/arch/arm/isa/formats/formats.isa +++ b/src/arch/arm/isa/formats/formats.isa @@ -37,8 +37,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Stephen Hines //Templates from this format are used later //Include the basic format diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa index 42f0ee830..df9c9f2c0 100644 --- a/src/arch/arm/isa/formats/fp.isa +++ b/src/arch/arm/isa/formats/fp.isa @@ -37,8 +37,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Stephen Hines //////////////////////////////////////////////////////////////////// // diff --git a/src/arch/arm/isa/formats/m5ops.isa b/src/arch/arm/isa/formats/m5ops.isa index 6b4112d5a..bbe6649ce 100644 --- a/src/arch/arm/isa/formats/m5ops.isa +++ b/src/arch/arm/isa/formats/m5ops.isa @@ -33,8 +33,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gene Wu /// def format M5ops() {{ diff --git a/src/arch/arm/isa/formats/macromem.isa b/src/arch/arm/isa/formats/macromem.isa index 98505be84..8eb77e9f2 100644 --- a/src/arch/arm/isa/formats/macromem.isa +++ b/src/arch/arm/isa/formats/macromem.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black def format ArmMacroMem() {{ decode_block = ''' diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa index 9bc23f6cf..121287252 100644 --- a/src/arch/arm/isa/formats/mem.isa +++ b/src/arch/arm/isa/formats/mem.isa @@ -37,8 +37,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black def format AddrMode2(imm) {{ if eval(imm): diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa index 739741786..3f74b0677 100644 --- a/src/arch/arm/isa/formats/misc.isa +++ b/src/arch/arm/isa/formats/misc.isa @@ -34,9 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black -// Giacomo Gabrielli def format Crc32() {{ decode_block = ''' diff --git a/src/arch/arm/isa/formats/mult.isa b/src/arch/arm/isa/formats/mult.isa index 142bfd67c..7c0b6941d 100644 --- a/src/arch/arm/isa/formats/mult.isa +++ b/src/arch/arm/isa/formats/mult.isa @@ -32,8 +32,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black def format ArmMultAndMultAcc() {{ decode_block = ''' diff --git a/src/arch/arm/isa/formats/neon64.isa b/src/arch/arm/isa/formats/neon64.isa index b4d4fdf7b..1bdc97c83 100644 --- a/src/arch/arm/isa/formats/neon64.isa +++ b/src/arch/arm/isa/formats/neon64.isa @@ -32,9 +32,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Giacomo Gabrielli -// Mbou Eyole output header {{ namespace Aarch64 diff --git a/src/arch/arm/isa/formats/pred.isa b/src/arch/arm/isa/formats/pred.isa index 8d254f571..67861efd0 100644 --- a/src/arch/arm/isa/formats/pred.isa +++ b/src/arch/arm/isa/formats/pred.isa @@ -37,8 +37,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Stephen Hines let {{ diff --git a/src/arch/arm/isa/formats/pseudo.isa b/src/arch/arm/isa/formats/pseudo.isa index 407b1c8d3..a1ee8ecbd 100644 --- a/src/arch/arm/isa/formats/pseudo.isa +++ b/src/arch/arm/isa/formats/pseudo.isa @@ -37,9 +37,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Andreas Sandberg -// Stephen Hines //////////////////////////////////////////////////////////////////// diff --git a/src/arch/arm/isa/formats/sve_2nd_level.isa b/src/arch/arm/isa/formats/sve_2nd_level.isa index 8bde189b2..b6f834038 100644 --- a/src/arch/arm/isa/formats/sve_2nd_level.isa +++ b/src/arch/arm/isa/formats/sve_2nd_level.isa @@ -32,8 +32,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Giacomo Gabrielli /// @file /// SVE 2nd-level decoder. diff --git a/src/arch/arm/isa/formats/sve_top_level.isa b/src/arch/arm/isa/formats/sve_top_level.isa index b8e1d468e..02c40bf2d 100644 --- a/src/arch/arm/isa/formats/sve_top_level.isa +++ b/src/arch/arm/isa/formats/sve_top_level.isa @@ -32,8 +32,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Giacomo Gabrielli /// @file /// SVE top-level decoder. diff --git a/src/arch/arm/isa/formats/uncond.isa b/src/arch/arm/isa/formats/uncond.isa index e0b07ab5a..ed5ed042f 100644 --- a/src/arch/arm/isa/formats/uncond.isa +++ b/src/arch/arm/isa/formats/uncond.isa @@ -32,8 +32,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black def format ArmUnconditional() {{ decode_block = ''' diff --git a/src/arch/arm/isa/includes.isa b/src/arch/arm/isa/includes.isa index 5f50eec62..9cdc1f926 100644 --- a/src/arch/arm/isa/includes.isa +++ b/src/arch/arm/isa/includes.isa @@ -37,8 +37,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Stephen Hines //////////////////////////////////////////////////////////////////// // diff --git a/src/arch/arm/isa/insts/aarch64.isa b/src/arch/arm/isa/insts/aarch64.isa index 6fcf9b5d2..17513d05f 100644 --- a/src/arch/arm/isa/insts/aarch64.isa +++ b/src/arch/arm/isa/insts/aarch64.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black let {{ movzCode = 'Dest64 = ((uint64_t)imm1) << imm2;' diff --git a/src/arch/arm/isa/insts/amo64.isa b/src/arch/arm/isa/insts/amo64.isa index 28136a88a..86ee7ba04 100644 --- a/src/arch/arm/isa/insts/amo64.isa +++ b/src/arch/arm/isa/insts/amo64.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Jordi Vaquero let {{ diff --git a/src/arch/arm/isa/insts/branch.isa b/src/arch/arm/isa/insts/branch.isa index 086abacb7..69a220ea0 100644 --- a/src/arch/arm/isa/insts/branch.isa +++ b/src/arch/arm/isa/insts/branch.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black let {{ diff --git a/src/arch/arm/isa/insts/branch64.isa b/src/arch/arm/isa/insts/branch64.isa index 054a24e5e..1c00e12a0 100644 --- a/src/arch/arm/isa/insts/branch64.isa +++ b/src/arch/arm/isa/insts/branch64.isa @@ -34,9 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black -// Giacomo Gabrielli let {{ diff --git a/src/arch/arm/isa/insts/crypto.isa b/src/arch/arm/isa/insts/crypto.isa index 27dc30e32..a75cf292e 100644 --- a/src/arch/arm/isa/insts/crypto.isa +++ b/src/arch/arm/isa/insts/crypto.isa @@ -34,9 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Matt Horsnell -// Prakash Ramrakhyani let {{ diff --git a/src/arch/arm/isa/insts/crypto64.isa b/src/arch/arm/isa/insts/crypto64.isa index a1de66cd9..4dd5fe5f5 100644 --- a/src/arch/arm/isa/insts/crypto64.isa +++ b/src/arch/arm/isa/insts/crypto64.isa @@ -34,10 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Matt Horsnell -// Prakash Ramrakhyani -// Giacomo Travaglini let {{ header_output = "" diff --git a/src/arch/arm/isa/insts/data.isa b/src/arch/arm/isa/insts/data.isa index df5a8b51e..70b9c5529 100644 --- a/src/arch/arm/isa/insts/data.isa +++ b/src/arch/arm/isa/insts/data.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black let {{ diff --git a/src/arch/arm/isa/insts/data64.isa b/src/arch/arm/isa/insts/data64.isa index 65ca024e9..16b3c5733 100644 --- a/src/arch/arm/isa/insts/data64.isa +++ b/src/arch/arm/isa/insts/data64.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black let {{ diff --git a/src/arch/arm/isa/insts/div.isa b/src/arch/arm/isa/insts/div.isa index 0896ea94f..57015692f 100644 --- a/src/arch/arm/isa/insts/div.isa +++ b/src/arch/arm/isa/insts/div.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black let {{ sdivCode = ''' diff --git a/src/arch/arm/isa/insts/fp.isa b/src/arch/arm/isa/insts/fp.isa index 5e6a0a698..9e94b86d2 100644 --- a/src/arch/arm/isa/insts/fp.isa +++ b/src/arch/arm/isa/insts/fp.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black output header {{ diff --git a/src/arch/arm/isa/insts/fp64.isa b/src/arch/arm/isa/insts/fp64.isa index 409780aa0..a7b76eadf 100644 --- a/src/arch/arm/isa/insts/fp64.isa +++ b/src/arch/arm/isa/insts/fp64.isa @@ -34,9 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Thomas Grocutt -// Edmund Grimley Evans let {{ diff --git a/src/arch/arm/isa/insts/insts.isa b/src/arch/arm/isa/insts/insts.isa index b4c798a4d..0697ca49d 100644 --- a/src/arch/arm/isa/insts/insts.isa +++ b/src/arch/arm/isa/insts/insts.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black //AArch64 instructions ##include "aarch64.isa" diff --git a/src/arch/arm/isa/insts/ldr.isa b/src/arch/arm/isa/insts/ldr.isa index 6e5122c6a..cab3cff3c 100644 --- a/src/arch/arm/isa/insts/ldr.isa +++ b/src/arch/arm/isa/insts/ldr.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black let {{ import math diff --git a/src/arch/arm/isa/insts/ldr64.isa b/src/arch/arm/isa/insts/ldr64.isa index 17789df16..96bf64297 100644 --- a/src/arch/arm/isa/insts/ldr64.isa +++ b/src/arch/arm/isa/insts/ldr64.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black let {{ diff --git a/src/arch/arm/isa/insts/m5ops.isa b/src/arch/arm/isa/insts/m5ops.isa index e93147859..4bae7a326 100644 --- a/src/arch/arm/isa/insts/m5ops.isa +++ b/src/arch/arm/isa/insts/m5ops.isa @@ -33,8 +33,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gene Wu let {{ diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa index d9eea197e..6f507b9b1 100644 --- a/src/arch/arm/isa/insts/macromem.isa +++ b/src/arch/arm/isa/insts/macromem.isa @@ -37,9 +37,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Stephen Hines -// Gabe Black //////////////////////////////////////////////////////////////////// // diff --git a/src/arch/arm/isa/insts/mem.isa b/src/arch/arm/isa/insts/mem.isa index 5510c6c72..14a3267a0 100644 --- a/src/arch/arm/isa/insts/mem.isa +++ b/src/arch/arm/isa/insts/mem.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black let {{ diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa index b2dc2f6d8..f0394be32 100644 --- a/src/arch/arm/isa/insts/misc.isa +++ b/src/arch/arm/isa/insts/misc.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black let {{ diff --git a/src/arch/arm/isa/insts/misc64.isa b/src/arch/arm/isa/insts/misc64.isa index 6d40dd913..88c68e623 100644 --- a/src/arch/arm/isa/insts/misc64.isa +++ b/src/arch/arm/isa/insts/misc64.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black let {{ svcCode = ''' diff --git a/src/arch/arm/isa/insts/mult.isa b/src/arch/arm/isa/insts/mult.isa index 7d084a671..2d889a11a 100644 --- a/src/arch/arm/isa/insts/mult.isa +++ b/src/arch/arm/isa/insts/mult.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black let {{ diff --git a/src/arch/arm/isa/insts/neon.isa b/src/arch/arm/isa/insts/neon.isa index 033a59b12..facdd1673 100644 --- a/src/arch/arm/isa/insts/neon.isa +++ b/src/arch/arm/isa/insts/neon.isa @@ -34,8 +34,6 @@ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black output header {{ template