From 4807c076ea550c5c3441380e7e2a56f3df229516 Mon Sep 17 00:00:00 2001 From: Andrey Belevantsev Date: Fri, 13 Apr 2018 13:24:02 +0300 Subject: [PATCH] re PR rtl-optimization/83852 (ICE in sel_redirect_edge_and_branch, at sel-sched-ir.c:5644 on 32-bit BE powerpc targets) PR rtl-optimization/83852 * gcc.dg/pr83852.c: New testcase. From-SVN: r259373 --- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.dg/pr83852.c | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 38 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/pr83852.c diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 7ab5274d295..29ac9f8b924 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-04-13 Andrey Belevantsev + + PR rtl-optimization/83852 + * gcc.dg/pr83852.c: New testcase. + 2018-04-13 Andreas Krebbel PR testsuite/85326 diff --git a/gcc/testsuite/gcc.dg/pr83852.c b/gcc/testsuite/gcc.dg/pr83852.c new file mode 100644 index 00000000000..68ef78b8e10 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr83852.c @@ -0,0 +1,33 @@ +/* { dg-do compile { target powerpc*-*-* ia64-*-* i?86-*-* x86_64-*-* } } */ +/* { dg-options "-std=gnu99 -O2 -fselective-scheduling -fno-if-conversion -fno-tree-dse -w" } */ +long long int uo; +unsigned int vt; + +void +r5 (long long int h8, long long int pu) +{ + short int wj; + long long int *mh = h8; + + for (wj = 0; wj < 3; ++wj) + { + int oq; + long long int ns, xf; + + h8 += 2; + oq = !!h8 && !!wj; + ++uo; + vt ^= oq + uo; + ns = !!uo && !!vt; + xf = (h8 != 0) ? mh : 1; + pu += ns < xf; + } + + for (pu = 0; pu < 1; ++pu) + { + int *sc; + + sc = (int *)&pu; + *sc = 0; + } +} -- 2.30.2