From 4848ced63112d3f4f07e6ae46f3038f9380b6323 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Fri, 22 Oct 2021 12:14:40 +0100
Subject: [PATCH]

---
 3d_gpu/architecture/dynamic_simd/slice.mdwn | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/3d_gpu/architecture/dynamic_simd/slice.mdwn b/3d_gpu/architecture/dynamic_simd/slice.mdwn
index 10a41ac4b..3e57cb834 100644
--- a/3d_gpu/architecture/dynamic_simd/slice.mdwn
+++ b/3d_gpu/architecture/dynamic_simd/slice.mdwn
@@ -14,6 +14,8 @@ b = b_s.sig # shorthand to make table smaller
 
 ## `a`'s Elements:
 
+(TODO 1: shrink to only 4 partitions.  TODO 2: convert to markdown)
+
 <table>
     <tr class="text-right">
         <th scope="row" class="text-left">Bit #</th>
@@ -59,6 +61,8 @@ So, slicing bits `3:6` of a 32-bit element of `a` must, because we have to match
 
 ## `b`'s Elements:
 
+(TODO 1: shrink to only 4 partitions.  TODO 2: convert to markdown)
+
 <table>
     <tr class="text-right">
         <th scope="row" class="text-left">Bit #</th>
@@ -107,6 +111,9 @@ So, slicing bits `3:6` of a 32-bit element of `a` must, because we have to match
     </tr>
 </table>
 
+(TODO: add an example of how this would then do e.g. an add (to another
+SimdSignal of only 8 bits in length or so)
+
 <style>
     /* duplicated from bootstrap so text editors can see it
         -- ignored by ikiwiki */
-- 
2.30.2