From 486560bf1d49c2f3da4521f4f026b5f3c43706d9 Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 7 Apr 2022 00:08:58 +0100 Subject: [PATCH] --- openpower/sv/branches.mdwn | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn index 82ca2ea2c..ee1344924 100644 --- a/openpower/sv/branches.mdwn +++ b/openpower/sv/branches.mdwn @@ -729,3 +729,16 @@ it violates the fundamental principle of SVP64 which is that SVP64 looping is a thin wrapper around Scalar Instructions. The pseducode below is more an actual Vector ISA Branch and as such is not aporopriate: + +``` +for i in 0 to VL-1: + ... + ... + cond_ok <- BO[0] | ¬(CR[BI+32] ^ BO[1]) + if ctr_ok & cond_ok then NIA <-iea LR[0:61] || 0b00 +# only at the end of looping is LK checked. +# this completely violates the design principle of SVP64 +# and would actually need to be a separate (scalar) +# instruction "set LR to CIA+4 but retrospectively" +if LK then LR <-iea CIA + 4 +``` -- 2.30.2