From 486f3b04a59e0ee9c669e6e81197575a36e19442 Mon Sep 17 00:00:00 2001 From: Francisco Jerez Date: Thu, 2 Apr 2020 17:42:57 -0700 Subject: [PATCH] intel/ir: Pass block cycle count information explicitly to disassembler. So we can eventually remove the cycle count estimates from the CFG data structure and consolidate performance information in the brw::performance object. It would be cleaner to pass the brw::performance object directly to the disassembler but that isn't straightforward since the disassembler is built as a plain C file unlike the rest of the compiler back-end. Reviewed-by: Kenneth Graunke --- src/intel/compiler/brw_disasm_info.c | 8 ++++++-- src/intel/compiler/brw_disasm_info.h | 3 ++- src/intel/compiler/brw_fs_generator.cpp | 2 +- src/intel/compiler/brw_vec4_generator.cpp | 2 +- src/intel/compiler/test_eu_validate.cpp | 2 +- 5 files changed, 11 insertions(+), 6 deletions(-) diff --git a/src/intel/compiler/brw_disasm_info.c b/src/intel/compiler/brw_disasm_info.c index bec83e8a65d..14cea9a77bd 100644 --- a/src/intel/compiler/brw_disasm_info.c +++ b/src/intel/compiler/brw_disasm_info.c @@ -31,7 +31,8 @@ __attribute__((weak)) void nir_print_instr(UNUSED const nir_instr *instr, UNUSED FILE *fp) {} void -dump_assembly(void *assembly, struct disasm_info *disasm) +dump_assembly(void *assembly, struct disasm_info *disasm, + const unsigned *block_latency) { const struct gen_device_info *devinfo = disasm->devinfo; const char *last_annotation_string = NULL; @@ -55,7 +56,10 @@ dump_assembly(void *assembly, struct disasm_info *disasm) struct bblock_t *predecessor_block = predecessor_link->block; fprintf(stderr, " <-B%d", predecessor_block->num); } - fprintf(stderr, " (%u cycles)\n", group->block_start->cycle_count); + if (block_latency) + fprintf(stderr, " (%u cycles)", + block_latency[group->block_start->num]); + fprintf(stderr, "\n"); } if (last_annotation_ir != group->ir) { diff --git a/src/intel/compiler/brw_disasm_info.h b/src/intel/compiler/brw_disasm_info.h index b8826e68175..932c06b6c30 100644 --- a/src/intel/compiler/brw_disasm_info.h +++ b/src/intel/compiler/brw_disasm_info.h @@ -65,7 +65,8 @@ struct disasm_info { }; void -dump_assembly(void *assembly, struct disasm_info *disasm); +dump_assembly(void *assembly, struct disasm_info *disasm, + const unsigned *block_latency); struct disasm_info * disasm_initialize(const struct gen_device_info *devinfo, diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index dc524a61e1d..fa2abd48553 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -2472,7 +2472,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width, /* overriding the shader makes disasm_info invalid */ if (!brw_try_override_assembly(p, start_offset, sha1buf)) { - dump_assembly(p->store, disasm_info); + dump_assembly(p->store, disasm_info, perf.block_latency); } else { fprintf(stderr, "Successfully overrode shader with sha1 %s\n\n", sha1buf); } diff --git a/src/intel/compiler/brw_vec4_generator.cpp b/src/intel/compiler/brw_vec4_generator.cpp index e95a70d8605..7c038c97196 100644 --- a/src/intel/compiler/brw_vec4_generator.cpp +++ b/src/intel/compiler/brw_vec4_generator.cpp @@ -2227,7 +2227,7 @@ generate_code(struct brw_codegen *p, /* overriding the shader makes disasm_info invalid */ if (!brw_try_override_assembly(p, 0, sha1buf)) { - dump_assembly(p->store, disasm_info); + dump_assembly(p->store, disasm_info, perf.block_latency); } else { fprintf(stderr, "Successfully overrode shader with sha1 %s\n\n", sha1buf); } diff --git a/src/intel/compiler/test_eu_validate.cpp b/src/intel/compiler/test_eu_validate.cpp index 16d1fc4faae..03da003c0d6 100644 --- a/src/intel/compiler/test_eu_validate.cpp +++ b/src/intel/compiler/test_eu_validate.cpp @@ -110,7 +110,7 @@ validate(struct brw_codegen *p) p->next_insn_offset, disasm); if (print) { - dump_assembly(p->store, disasm); + dump_assembly(p->store, disasm, NULL); } ralloc_free(disasm); -- 2.30.2