From 48f0f0945030639a9bb571906487700ff21887e3 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 29 May 2019 21:33:17 +0100 Subject: [PATCH] use boolean version of SRLatch, suitable for multi-bit now --- src/nmutil/latch.py | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/src/nmutil/latch.py b/src/nmutil/latch.py index fd28cd4a..cf41a0d3 100644 --- a/src/nmutil/latch.py +++ b/src/nmutil/latch.py @@ -43,24 +43,11 @@ class SRLatch(Elaboratable): m = Module() q_int = Signal() + m.d.sync += q_int.eq((q_int & ~self.r) | self.s) if self.sync: - with m.If(self.s): - m.d.sync += q_int.eq(1) - with m.Elif(self.r): - m.d.sync += q_int.eq(0) - with m.Else(): - m.d.sync += q_int.eq(q_int) m.d.comb += self.q.eq(q_int) else: - with m.If(self.s): - m.d.sync += q_int.eq(1) - m.d.comb += self.q.eq(1) - with m.Elif(self.r): - m.d.sync += q_int.eq(0) - m.d.comb += self.q.eq(0) - with m.Else(): - m.d.sync += q_int.eq(q_int) - m.d.comb += self.q.eq(q_int) + m.d.comb += self.q.eq((q_int & ~self.r) | self.s) m.d.comb += self.qn.eq(~self.q) m.d.comb += self.qlq.eq(self.q | q_int) # useful output -- 2.30.2