From 496c48d9b2cdf77e7c73c04307db9a0ff19828c0 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Tue, 18 May 2004 16:26:16 -0400 Subject: [PATCH] Major clean up of alpha system files. console/Makefile: palcode/Makefile: moved header files to /h so updated make file for that console/dbmentry.s: console/paljtokern.s: console/paljtoslave.s: upadated to use osf file that the palcode uses, one less file --- system/alpha/console/Makefile | 4 +- system/alpha/console/dbmentry.s | 2 +- system/alpha/console/paljtokern.s | 7 +- system/alpha/console/paljtoslave.s | 7 +- system/alpha/{palcode => h}/cserve.h | 0 .../{palcode => h}/dc21164FromGasSources.h | 0 system/alpha/{palcode => h}/ev5_alpha_defs.h | 0 system/alpha/{palcode => h}/ev5_defs.h | 0 system/alpha/{palcode => h}/ev5_impure.h | 0 .../alpha/{palcode => h}/ev5_osfalpha_defs.h | 0 system/alpha/{palcode => h}/ev5_paldef.h | 0 .../alpha/{palcode => h}/fromHudsonMacros.h | 0 system/alpha/{palcode => h}/fromHudsonOsf.h | 0 system/alpha/{palcode => h}/platform.h | 0 system/alpha/{palcode => h}/simos.h | 0 system/alpha/{palcode => h}/tlaserreg.h | 0 system/alpha/palcode/Makefile | 4 +- system/alpha/palcode/dc21164.h | 961 ------------------ system/alpha/palcode/macros.h | 137 --- system/alpha/palcode/osf.h | 545 ---------- system/alpha/palcode/xxm.sed | 5 - 21 files changed, 13 insertions(+), 1659 deletions(-) rename system/alpha/{palcode => h}/cserve.h (100%) rename system/alpha/{palcode => h}/dc21164FromGasSources.h (100%) rename system/alpha/{palcode => h}/ev5_alpha_defs.h (100%) rename system/alpha/{palcode => h}/ev5_defs.h (100%) rename system/alpha/{palcode => h}/ev5_impure.h (100%) rename system/alpha/{palcode => h}/ev5_osfalpha_defs.h (100%) rename system/alpha/{palcode => h}/ev5_paldef.h (100%) rename system/alpha/{palcode => h}/fromHudsonMacros.h (100%) rename system/alpha/{palcode => h}/fromHudsonOsf.h (100%) rename system/alpha/{palcode => h}/platform.h (100%) rename system/alpha/{palcode => h}/simos.h (100%) rename system/alpha/{palcode => h}/tlaserreg.h (100%) delete mode 100644 system/alpha/palcode/dc21164.h delete mode 100644 system/alpha/palcode/macros.h delete mode 100644 system/alpha/palcode/osf.h delete mode 100644 system/alpha/palcode/xxm.sed diff --git a/system/alpha/console/Makefile b/system/alpha/console/Makefile index 518596058..1020bfb39 100644 --- a/system/alpha/console/Makefile +++ b/system/alpha/console/Makefile @@ -33,11 +33,11 @@ printf.o: printf.c $(CC) -g3 $(INCLUDES) -nostdinc++ -o $*.o -c $*.c paljtokern.s.o: paljtokern.s - g++ -I ../palcode -E -P -nostdinc -nostdinc++ -x c++ paljtokern.s | \ + g++ -I ../h -E -P -nostdinc -nostdinc++ -x c++ paljtokern.s | \ $(AS) -m 21164 -o paljtokern.s.o paljtoslave.s.o: paljtoslave.s - g++ -I ../palcode -E -P -nostdinc -nostdinc++ -x c++ paljtoslave.s | \ + g++ -I ../h -E -P -nostdinc -nostdinc++ -x c++ paljtoslave.s | \ $(AS) -m 21164 -o paljtoslave.s.o console: console.o dbmentry.o printf.o paljtokern.s.o paljtoslave.s.o diff --git a/system/alpha/console/dbmentry.s b/system/alpha/console/dbmentry.s index 754fee234..d8741e658 100644 --- a/system/alpha/console/dbmentry.s +++ b/system/alpha/console/dbmentry.s @@ -15,7 +15,7 @@ #ifndef MAKEDEPEND #include "ev5_impure.h" #include "cserve.h" -#include "osf.h" +#include "fromHudsonOsf.h" #endif //#include "paldefs.h" diff --git a/system/alpha/console/paljtokern.s b/system/alpha/console/paljtokern.s index 979d719a9..66b593461 100644 --- a/system/alpha/console/paljtokern.s +++ b/system/alpha/console/paljtokern.s @@ -1,6 +1,7 @@ -#include "dc21164.h" // DECchip 21164 specific definitions -#include "osf.h" // OSF/1 specific definitions -#include "macros.h" // Global macro definitions +#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions +#include "ev5_defs.h" +#include "fromHudsonOsf.h" // OSF/1 specific definitions +#include "fromHudsonMacros.h" // Global macro definitions #include "ev5_impure.h" // Scratch & logout area data structures #include "platform.h" // Platform specific definitions diff --git a/system/alpha/console/paljtoslave.s b/system/alpha/console/paljtoslave.s index c1809afb7..3c3abd01c 100644 --- a/system/alpha/console/paljtoslave.s +++ b/system/alpha/console/paljtoslave.s @@ -1,6 +1,7 @@ -#include "dc21164.h" // DECchip 21164 specific definitions -#include "osf.h" // OSF/1 specific definitions -#include "macros.h" // Global macro definitions +#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions +#include "ev5_defs.h" +#include "fromHudsonOsf.h" // OSF/1 specific definitions +#include "fromHudsonMacros.h" // Global macro definitions #include "ev5_impure.h" // Scratch & logout area data structures #include "platform.h" // Platform specific definitions diff --git a/system/alpha/palcode/cserve.h b/system/alpha/h/cserve.h similarity index 100% rename from system/alpha/palcode/cserve.h rename to system/alpha/h/cserve.h diff --git a/system/alpha/palcode/dc21164FromGasSources.h b/system/alpha/h/dc21164FromGasSources.h similarity index 100% rename from system/alpha/palcode/dc21164FromGasSources.h rename to system/alpha/h/dc21164FromGasSources.h diff --git a/system/alpha/palcode/ev5_alpha_defs.h b/system/alpha/h/ev5_alpha_defs.h similarity index 100% rename from system/alpha/palcode/ev5_alpha_defs.h rename to system/alpha/h/ev5_alpha_defs.h diff --git a/system/alpha/palcode/ev5_defs.h b/system/alpha/h/ev5_defs.h similarity index 100% rename from system/alpha/palcode/ev5_defs.h rename to system/alpha/h/ev5_defs.h diff --git a/system/alpha/palcode/ev5_impure.h b/system/alpha/h/ev5_impure.h similarity index 100% rename from system/alpha/palcode/ev5_impure.h rename to system/alpha/h/ev5_impure.h diff --git a/system/alpha/palcode/ev5_osfalpha_defs.h b/system/alpha/h/ev5_osfalpha_defs.h similarity index 100% rename from system/alpha/palcode/ev5_osfalpha_defs.h rename to system/alpha/h/ev5_osfalpha_defs.h diff --git a/system/alpha/palcode/ev5_paldef.h b/system/alpha/h/ev5_paldef.h similarity index 100% rename from system/alpha/palcode/ev5_paldef.h rename to system/alpha/h/ev5_paldef.h diff --git a/system/alpha/palcode/fromHudsonMacros.h b/system/alpha/h/fromHudsonMacros.h similarity index 100% rename from system/alpha/palcode/fromHudsonMacros.h rename to system/alpha/h/fromHudsonMacros.h diff --git a/system/alpha/palcode/fromHudsonOsf.h b/system/alpha/h/fromHudsonOsf.h similarity index 100% rename from system/alpha/palcode/fromHudsonOsf.h rename to system/alpha/h/fromHudsonOsf.h diff --git a/system/alpha/palcode/platform.h b/system/alpha/h/platform.h similarity index 100% rename from system/alpha/palcode/platform.h rename to system/alpha/h/platform.h diff --git a/system/alpha/palcode/simos.h b/system/alpha/h/simos.h similarity index 100% rename from system/alpha/palcode/simos.h rename to system/alpha/h/simos.h diff --git a/system/alpha/palcode/tlaserreg.h b/system/alpha/h/tlaserreg.h similarity index 100% rename from system/alpha/palcode/tlaserreg.h rename to system/alpha/h/tlaserreg.h diff --git a/system/alpha/palcode/Makefile b/system/alpha/palcode/Makefile index 14a700c73..4f0cc969c 100644 --- a/system/alpha/palcode/Makefile +++ b/system/alpha/palcode/Makefile @@ -7,7 +7,7 @@ GAS = alpha-elf-as CC = alpha-elf-g++ LD = alpha-elf-ld #CFLAGS=-I ../h -E -P -D SIMOS -nostdinc -nostdinc++ -x c++ -CFLAGS=-I . -E -P -D SIMOS -D BUILD_PALCODE -nostdinc -nostdinc++ -x c++ +CFLAGS=-I . -I ../h -E -P -D SIMOS -D BUILD_PALCODE -nostdinc -nostdinc++ -x c++ GASFLAGS=-m21164 LDFLAGS=-Ttext 0x4000 @@ -31,5 +31,5 @@ tsunami: $(PREPROC) $(TSOBJS) $(LD) $(LDFLAGS) -o ts_osfpal $(TSOBJS) clean: - rm -f *.o *.i osfpal + rm -f *.o *.i osfpal ts_osfpal tl_osfpal diff --git a/system/alpha/palcode/dc21164.h b/system/alpha/palcode/dc21164.h deleted file mode 100644 index 4bdb118c0..000000000 --- a/system/alpha/palcode/dc21164.h +++ /dev/null @@ -1,961 +0,0 @@ -/* - * VID: [T1.2] PT: [Fri Apr 21 16:47:11 1995] SF: [dc21164.h] - * TI: [/sae_users/cruz/bin/vice -iplatform.s -l// -p# -DEB164 -h -m -aeb164 ] - */ -#define __DC21164_LOADED 1 -/* -***************************************************************************** -** * -** Copyright © 1993, 1994 * -** by Digital Equipment Corporation, Maynard, Massachusetts. * -** * -** All Rights Reserved * -** * -** Permission is hereby granted to use, copy, modify and distribute * -** this software and its documentation, in both source code and * -** object code form, and without fee, for the purpose of distribution * -** of this software or modifications of this software within products * -** incorporating an integrated circuit implementing Digital's AXP * -** architecture, regardless of the source of such integrated circuit, * -** provided that the above copyright notice and this permission notice * -** appear in all copies, and that the name of Digital Equipment * -** Corporation not be used in advertising or publicity pertaining to * -** distribution of the document or software without specific, written * -** prior permission. * -** * -** Digital Equipment Corporation disclaims all warranties and/or * -** guarantees with regard to this software, including all implied * -** warranties of fitness for a particular purpose and merchantability, * -** and makes no representations regarding the use of, or the results * -** of the use of, the software and documentation in terms of correctness, * -** accuracy, reliability, currentness or otherwise; and you rely on * -** the software, documentation and results solely at your own risk. * -** * -** AXP is a trademark of Digital Equipment Corporation. * -** * -***************************************************************************** -** -** FACILITY: -** -** DECchip 21164 PALcode -** -** MODULE: -** -** dc21164.h -** -** MODULE DESCRIPTION: -** -** DECchip 21164 specific definitions -** -** AUTHOR: ER -** -** CREATION DATE: 24-Nov-1993 -** -** $Id: dc21164.h,v 1.1.1.1 1997/10/30 23:27:18 verghese Exp $ -** -** MODIFICATION HISTORY: -** -** $Log: dc21164.h,v $ -** Revision 1.1.1.1 1997/10/30 23:27:18 verghese -** current 10/29/97 -** -** Revision 1.15 1995/04/21 02:06:30 fdh -** Replaced C++ style comments with Standard C style comments. -** -** Revision 1.14 1995/03/20 14:55:23 samberg -** Add flushIc to make Roger Cruz's life easier. -** -** Revision 1.13 1994/12/14 15:52:48 samberg -** Add slXmit and slRcv bit definitions -** -** Revision 1.12 1994/09/07 15:43:49 samberg -** Changes for Makefile.vpp, take out OSF definition -** -** Revision 1.11 1994/07/26 17:38:35 samberg -** Changes for SD164. -** -** Revision 1.10 1994/07/08 17:02:12 samberg -** Changes to support platform specific additions -** -** Revision 1.8 1994/05/31 15:49:21 ericr -** Moved ptKdebug from pt10 to pt13; pt10 is used in MCHK flows -** -** Revision 1.7 1994/05/26 19:29:51 ericr -** Added BC_CONFIG definitions -** -** Revision 1.6 1994/05/25 14:27:25 ericr -** Added physical bit to ldq_lp and stq_cp macros -** -** Revision 1.5 1994/05/20 18:07:50 ericr -** Changed line comments to C++ style comment character -** -** Revision 1.4 1994/01/17 21:46:54 ericr -** Added floating point register definitions -** -** Revision 1.3 1994/01/03 19:31:49 ericr -** Added cache parity error status register definitions -** -** Revision 1.2 1993/12/22 20:42:35 eric -** Added ptTrap, ptMisc and flag definitions -** Added PAL shadow regsiter definitions -** -** Revision 1.1 1993/12/16 21:55:05 eric -** Initial revision -** -** -**-- -*/ - - -/* -** -** INTERNAL PROCESSOR REGISTER DEFINITIONS -** -** The internal processor register definitions below are annotated -** with one of the following symbols: -** -** RW - The register may be read and written -** RO - The register may only be read -** WO - The register may only be written -** -** For RO and WO registers, all bits and fields within the register are -** also read-only or write-only. For RW registers, each bit or field -** within the register is annotated with one of the following: -** -** RW - The bit/field may be read and written -** RO - The bit/field may be read; writes are ignored -** WO - The bit/field may be written; reads return UNPREDICTABLE -** WZ - The bit/field may be written; reads return a zero value -** W0C - The bit/field may be read; write-zero-to-clear -** W1C - The bit/field may be read; write-one-to-clear -** WA - The bit/field may be read; write-anything-to-clear -** RC - The bit/field may be read, causing state to clear; -** writes are ignored -** -*/ - - -/* -** -** Ibox IPR Definitions: -** -*/ - -#define isr 0x100 /* RO - Interrupt Summary */ -#define itbTag 0x101 /* WO - ITB Tag */ -#define itbPte 0x102 /* RW - ITB Page Table Entry */ -#define itbAsn 0x103 /* RW - ITB Address Space Number */ -#define itbPteTemp 0x104 /* RO - ITB Page Table Entry Temporary */ -#define itbIa 0x105 /* WO - ITB Invalidate All */ -#define itbIap 0x106 /* WO - ITB Invalidate All Process */ -#define itbIs 0x107 /* WO - ITB Invalidate Single */ -#define sirr 0x108 /* RW - Software Interrupt Request */ -#define astrr 0x109 /* RW - Async. System Trap Request */ -#define aster 0x10A /* RW - Async. System Trap Enable */ -#define excAddr 0x10B /* RW - Exception Address */ -#define excSum 0x10C /* RW - Exception Summary */ -#define excMask 0x10D /* RO - Exception Mask */ -#define palBase 0x10E /* RW - PAL Base */ -#define ips 0x10F /* RW - Processor Status */ -#define ipl 0x110 /* RW - Interrupt Priority Level */ -#define intId 0x111 /* RO - Interrupt ID */ -#define iFaultVaForm 0x112 /* RO - Formatted Faulting VA */ -#define iVptBr 0x113 /* RW - I-Stream Virtual Page Table Base */ -#define hwIntClr 0x115 /* WO - Hardware Interrupt Clear */ -#define slXmit 0x116 /* WO - Serial Line Transmit */ -#define slRcv 0x117 /* RO - Serial Line Receive */ -#define icsr 0x118 /* RW - Ibox Control/Status */ -#define icFlush 0x119 /* WO - I-Cache Flush Control */ -#define flushIc 0x119 /* WO - I-Cache Flush Control (DC21064 Symbol) */ -#define icPerr 0x11A /* RW - I-Cache Parity Error Status */ -#define PmCtr 0x11C /* RW - Performance Counter */ - -/* -** -** Ibox Control/Status Register (ICSR) Bit Summary -** -** Extent Size Name Type Function -** ------ ---- ---- ---- ------------------------------------ -** <39> 1 TST RW,0 Assert Test Status -** <38> 1 ISTA RO I-Cache BIST Status -** <37> 1 DBS RW,1 Debug Port Select -** <36> 1 FBD RW,0 Force Bad I-Cache Data Parity -** <35> 1 FBT RW,0 Force Bad I-Cache Tag Parity -** <34> 1 FMS RW,0 Force I-Cache Miss -** <33> 1 SLE RW,0 Enable Serial Line Interrupts -** <32> 1 CRDE RW,0 Enable Correctable Error Interrupts -** <30> 1 SDE RW,0 Enable PAL Shadow Registers -** <29:28> 2 SPE RW,0 Enable I-Stream Super Page Mode -** <27> 1 HWE RW,0 Enable PALRES Instrs in Kernel Mode -** <26> 1 FPE RW,0 Enable Floating Point Instructions -** <25> 1 TMD RW,0 Disable Ibox Timeout Counter -** <24> 1 TMM RW,0 Timeout Counter Mode -** -*/ - -#define ICSR_V_TST 39 -#define ICSR_M_TST (1< 1 TMT WO,1 Serial line transmit data -** -*/ - -#define SLXMIT_V_TMT 7 -#define SLXMIT_M_TMT (1< 1 RCV RO Serial line receive data -** -*/ - -#define SLRCV_V_RCV 6 -#define SLRCV_M_RCV (1< 1 TMR W1C Timeout reset error -** <12> 1 TPE W1C Tag parity error -** <11> 1 DPE W1C Data parity error -** -*/ - -#define ICPERR_V_TMR 13 -#define ICPERR_M_TMR (1< 1 IOV WA Integer overflow -** <15> 1 INE WA Inexact result -** <14> 1 UNF WA Underflow -** <13> 1 FOV WA Overflow -** <12> 1 DZE WA Division by zero -** <11> 1 INV WA Invalid operation -** <10> 1 SWC WA Software completion -** -*/ - -#define EXC_V_IOV 16 -#define EXC_M_IOV (1< 1 SLC W1C Clear Serial Line interrupt -** <32> 1 CRDC W1C Clear Correctable Read Data interrupt -** <29> 1 PC2C W1C Clear Performance Counter 2 interrupt -** <28> 1 PC1C W1C Clear Performance Counter 1 interrupt -** <27> 1 PC0C W1C Clear Performance Counter 0 interrupt -** -*/ - -#define HWINT_V_SLC 33 -#define HWINT_M_SLC (1< 1 HLT RO External Halt interrupt -** <33> 1 SLI RO Serial Line interrupt -** <32> 1 CRD RO Correctable ECC errors -** <31> 1 MCK RO System Machine Check -** <30> 1 PFL RO Power Fail -** <29> 1 PC2 RO Performance Counter 2 interrupt -** <28> 1 PC1 RO Performance Counter 1 interrupt -** <27> 1 PC0 RO Performance Counter 0 interrupt -** <23> 1 I23 RO External Hardware interrupt -** <22> 1 I22 RO External Hardware interrupt -** <21> 1 I21 RO External Hardware interrupt -** <20> 1 I20 RO External Hardware interrupt -** <19> 1 ATR RO Async. System Trap request -** <18:4> 15 SIRR RO,0 Software Interrupt request -** <3:0> 4 ASTRR RO Async. System Trap request (USEK) -** -**/ - -#define ISR_V_HLT 34 -#define ISR_M_HLT (1< 6 OPCODE RO Opcode of faulting instruction -** <10:06> 5 RA RO Ra field of faulting instruction -** <5> 1 BAD_VA RO Bad virtual address -** <4> 1 DTB_MISS RO Reference resulted in DTB miss -** <3> 1 FOW RO Fault on write -** <2> 1 FOR RO Fault on read -** <1> 1 ACV RO Access violation -** <0> 1 WR RO Reference type -** -*/ - -#define MMSTAT_V_OPC 11 -#define MMSTAT_M_OPC (0x3F< 1 DBG1 RW,0 Mbox Debug Packet Select -** <4> 1 E_BE RW,0 Ebox Big Endian mode enable -** <3> 1 DBG0 RW,0 Debug Test Select -** <2:1> 2 SP RW,0 Superpage mode enable -** <0> 1 M_BE RW,0 Mbox Big Endian mode enable -** -*/ - -#define MCSR_V_DBG1 5 -#define MCSR_M_DBG1 (1< 1 TP1 RO Dcache bank 1 tag parity error -** <4> 1 TP0 RO Dcache bank 0 tag parity error -** <3> 1 DP1 RO Dcache bank 1 data parity error -** <2> 1 DP0 RO Dcache bank 0 data parity error -** <1> 1 LOCK W1C Locks/clears bits <5:2> -** <0> 1 SEO W1C Second Dcache parity error occurred -** -*/ - -#define DCPERR_V_TP1 5 -#define DCPERR_M_TP1 (1< 1 DOA RO Hardware Dcache Disable -** <3> 1 PERR_DIS RW,0 Disable Dcache Parity Error reporting -** <2> 1 BAD_DP RW,0 Force Dcache data bad parity -** <1> 1 FHIT RW,0 Force Dcache hit -** <0> 1 ENA RW,0 Software Dcache Enable -** -*/ - -#define DC_V_DOA 4 -#define DC_M_DOA (1< 1 WB RO,0 If set, pending WB request -** <6> 1 DREAD RO,0 If set, pending D-read request -** -*/ - -#define MAF_V_WB_PENDING 7 -#define MAF_M_WB_PENDING (1< 3 SET_EN RW,1 Set enable -** <12> 1 BLK_SIZE RW,1 Scache/Bcache block size select -** <11:08> 4 FB_DP RW,0 Force bad data parity -** <07:02> 6 TAG_STAT RW Tag status and parity -** <1> 1 FLUSH RW,0 If set, clear all tag valid bits -** <0> 1 FHIT RW,0 Force hits -** -*/ - -#define SC_V_SET_EN 13 -#define SC_M_SET_EN (7< 1 DIS_VIC_BUF WO,0 Disable Scache victim buffer -** <26> 1 DIS_BAF_BYP WO,0 Disable speculative Bcache reads -** <25> 1 DBG_MUX_SEL WO,0 Debug MUX select -** <24:19> 6 PM_MUX_SEL WO,0 Performance counter MUX select -** <18:17> 2 BC_WAVE WO,0 Number of cycles of wave pipelining -** <16> 1 TL_PIPE_LATCH WO,0 Pipe system control pins -** <15> 1 EI_DIS_ERR WO,1 Disable ECC (parity) error -** <14:13> 2 BC_BAD_DAT WO,0 Force bad data -** <12:08> 5 BC_TAG_STAT WO Bcache tag status and parity -** <7> 1 BC_FHIT WO,0 Bcache force hit -** <6> 1 EI_ECC WO,1 ECC or byte parity mode -** <5> 1 VTM_FIRST WO,1 Drive out victim block address first -** <4> 1 CORR_FILL_DAT WO,1 Correct fill data -** <3> 1 EI_CMD_GRP3 WO,0 Drive MB command to external pins -** <2> 1 EI_CMD_GRP2 WO,0 Drive LOCK & SET_DIRTY to ext. pins -** <1> 1 ALLOC_CYC WO,0 Allocate cycle for non-cached LDs. -** <0> 1 BC_ENA W0,0 Bcache enable -** -*/ -#define BC_V_DIS_SC_VIC_BUF 27 -#define BC_M_DIS_SC_VIC_BUF (1<>1) -/* -** -** Bcache Configuration Register (BC_CONFIG) Bit Summary -** -** Extent Size Name Type Function -** ------ ---- ---- ---- --------------------------------- -** <35:29> 7 RSVD WO Reserved - Must Be Zero -** <28:20> 9 WE_CTL WO,0 Bcache write enable control -** <19:19> 1 RSVD WO,0 Reserved - Must Be Zero -** <18:16> 3 WE_OFF WO,1 Bcache fill write enable pulse offset -** <15:15> 1 RSVD WO,0 Reserved - Must Be Zero -** <14:12> 3 RD_WR_SPC WO,7 Bcache private read/write spacing -** <11:08> 4 WR_SPD WO,4 Bcache write speed in CPU cycles -** <07:04> 4 RD_SPD WO,4 Bcache read speed in CPU cycles -** <03:03> 1 RSVD WO,0 Reserved - Must Be Zero -** <02:00> 3 SIZE WO,1 Bcache size -*/ -#define BC_V_WE_CTL 20 -#define BC_M_WE_CTL (0x1FF< = 1. -*/ - -#define p0 r8 /* ITB/DTB Miss Scratch */ -#define p1 r9 /* ITB/DTB Miss Scratch */ -#define p2 r10 /* ITB/DTB Miss Scratch */ -#define p3 r11 -#define ps r11 /* Processor Status */ -#define p4 r12 /* Local Scratch */ -#define p5 r13 /* Local Scratch */ -#define p6 r14 /* Local Scratch */ -#define p7 r25 /* Local Scratch */ - -/* -** SRM Defined State Definitions: -*/ - -/* -** This table is an accounting of the DECchip 21164 storage used to -** implement the SRM defined state for OSF/1. -** -** IPR Name Internal Storage -** -------- ---------------- -** Processor Status ps, dtbCm, ipl, r11 -** Program Counter Ibox -** Interrupt Entry ptEntInt -** Arith Trap Entry ptEntArith -** MM Fault Entry ptEntMM -** Unaligned Access Entry ptEntUna -** Instruction Fault Entry ptEntIF -** Call System Entry ptEntSys -** User Stack Pointer ptUsp -** Kernel Stack Pointer ptKsp -** Kernel Global Pointer ptKgp -** System Value ptSysVal -** Page Table Base Register ptPtbr -** Virtual Page Table Base iVptBr, mVptBr -** Process Control Block Base ptPcbb -** Address Space Number itbAsn, dtbAsn -** Cycle Counter cc, ccCtl -** Float Point Enable icsr -** Lock Flag Cbox/System -** Unique PCB -** Who-Am-I ptWhami -*/ - -#define ptEntUna pt2 /* Unaligned Access Dispatch Entry */ -#define ptImpure pt3 /* Pointer To PAL Scratch Area */ -#define ptEntIF pt7 /* Instruction Fault Dispatch Entry */ -#define ptIntMask pt8 /* Interrupt Enable Mask */ -#define ptEntSys pt9 /* Call System Dispatch Entry */ -#define ptTrap pt11 -#define ptEntInt pt11 /* Hardware Interrupt Dispatch Entry */ -#define ptEntArith pt12 /* Arithmetic Trap Dispatch Entry */ -#if defined(KDEBUG) -#define ptEntDbg pt13 /* Kernel Debugger Dispatch Entry */ -#endif /* KDEBUG */ -#define ptMisc pt16 /* Miscellaneous Flags */ -#define ptWhami pt16 /* Who-Am-I Register Pt16<15:8> */ -#define ptMces pt16 /* Machine Check Error Summary Pt16<4:0> */ -#define ptSysVal pt17 /* Per-Processor System Value */ -#define ptUsp pt18 /* User Stack Pointer */ -#define ptKsp pt19 /* Kernel Stack Pointer */ -#define ptPtbr pt20 /* Page Table Base Register */ -#define ptEntMM pt21 /* MM Fault Dispatch Entry */ -#define ptKgp pt22 /* Kernel Global Pointer */ -#define ptPcbb pt23 /* Process Control Block Base */ - -/* -** -** Miscellaneous PAL State Flags (ptMisc) Bit Summary -** -** Extent Size Name Function -** ------ ---- ---- --------------------------------- -** <55:48> 8 SWAP Swap PALcode flag -- character 'S' -** <47:32> 16 MCHK Machine Check Error code -** <31:16> 16 SCB System Control Block vector -** <15:08> 8 WHAMI Who-Am-I identifier -** <04:00> 5 MCES Machine Check Error Summary bits -** -*/ - -#define PT16_V_MCES 0 -#define PT16_V_WHAMI 8 -#define PT16_V_SCB 16 -#define PT16_V_MCHK 32 -#define PT16_V_SWAP 48 - diff --git a/system/alpha/palcode/macros.h b/system/alpha/palcode/macros.h deleted file mode 100644 index ab902c06f..000000000 --- a/system/alpha/palcode/macros.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * VID: [T1.2] PT: [Fri Apr 21 16:47:16 1995] SF: [macros.h] - * TI: [/sae_users/cruz/bin/vice -iplatform.s -l// -p# -DEB164 -h -m -aeb164 ] - */ -#define __MACROS_LOADED 1 -/* -***************************************************************************** -** * -** Copyright © 1993, 1994 * -** by Digital Equipment Corporation, Maynard, Massachusetts. * -** * -** All Rights Reserved * -** * -** Permission is hereby granted to use, copy, modify and distribute * -** this software and its documentation, in both source code and * -** object code form, and without fee, for the purpose of distribution * -** of this software or modifications of this software within products * -** incorporating an integrated circuit implementing Digital's AXP * -** architecture, regardless of the source of such integrated circuit, * -** provided that the above copyright notice and this permission notice * -** appear in all copies, and that the name of Digital Equipment * -** Corporation not be used in advertising or publicity pertaining to * -** distribution of the document or software without specific, written * -** prior permission. * -** * -** Digital Equipment Corporation disclaims all warranties and/or * -** guarantees with regard to this software, including all implied * -** warranties of fitness for a particular purpose and merchantability, * -** and makes no representations regarding the use of, or the results * -** of the use of, the software and documentation in terms of correctness, * -** accuracy, reliability, currentness or otherwise; and you rely on * -** the software, documentation and results solely at your own risk. * -** * -** AXP is a trademark of Digital Equipment Corporation. * -** * -***************************************************************************** -** -** FACILITY: -** -** DECchip 21164 PALcode -** -** MODULE: -** -** macros.h -** -** MODULE DESCRIPTION: -** -** DECchip 21164 PALcode macro definitions -** -** AUTHOR: ER -** -** CREATION DATE: 29-Nov-1993 -** -** $Id: macros.h,v 1.1.1.1 1997/10/30 23:27:19 verghese Exp $ -** -** MODIFICATION HISTORY: -** -** $Log: macros.h,v $ -** Revision 1.1.1.1 1997/10/30 23:27:19 verghese -** current 10/29/97 -** -** Revision 1.5 1994/07/08 17:03:12 samberg -** Changes to support platform specific additions -** -** Revision 1.4 1994/05/20 19:24:19 ericr -** Moved STALL macro from osfpal.s to here -** Added LDLI macro -** -** Revision 1.3 1994/05/20 18:08:14 ericr -** Changed line comments to C++ style comment character -** -** Revision 1.2 1994/02/28 18:45:51 ericr -** Fixed EGORE related bugs -** -** Revision 1.1 1993/12/16 21:55:05 eric -** Initial revision -** -** -**-- -*/ - -#define STALL \ - mfpr r31, pt0 - -#define NOP \ - bis $31, $31, $31 - -/* -** Align code on an 8K byte page boundary. -*/ - -#define ALIGN_PAGE \ - .align 13 - -/* -** Align code on a 32 byte block boundary. -*/ - -#define ALIGN_BLOCK \ - .align 5 - -/* -** Align code on a quadword boundary. -*/ - -#define ALIGN_BRANCH \ - .align 3 - -/* -** Hardware vectors go in .text 0 sub-segment. -*/ - -#define HDW_VECTOR(offset) \ - . = offset - -/* -** Privileged CALL_PAL functions are in .text 1 sub-segment. -*/ - -#define CALL_PAL_PRIV(vector) \ - . = (PAL_CALL_PAL_PRIV_ENTRY+(vector<<6)) - -/* -** Unprivileged CALL_PAL functions are in .text 1 sub-segment, -** the privileged bit is removed from these vectors. -*/ - -#define CALL_PAL_UNPRIV(vector) \ - . = (PAL_CALL_PAL_UNPRIV_ENTRY+((vector&0x3F)<<6)) - -/* -** Implements a load "immediate" longword function -*/ -#define LDLI(reg,val) \ - ldah reg, ((val+0x8000) >> 16)(zero); \ - lda reg, (val&0xffff)(reg) - diff --git a/system/alpha/palcode/osf.h b/system/alpha/palcode/osf.h deleted file mode 100644 index 316d83cf1..000000000 --- a/system/alpha/palcode/osf.h +++ /dev/null @@ -1,545 +0,0 @@ -/* - * VID: [T1.2] PT: [Fri Apr 21 16:47:14 1995] SF: [osf.h] - * TI: [/sae_users/cruz/bin/vice -iplatform.s -l// -p# -DEB164 -h -m -aeb164 ] - */ -#define __OSF_LOADED 1 -/* -***************************************************************************** -** * -** Copyright © 1993, 1994 * -** by Digital Equipment Corporation, Maynard, Massachusetts. * -** * -** All Rights Reserved * -** * -** Permission is hereby granted to use, copy, modify and distribute * -** this software and its documentation, in both source code and * -** object code form, and without fee, for the purpose of distribution * -** of this software or modifications of this software within products * -** incorporating an integrated circuit implementing Digital's AXP * -** architecture, regardless of the source of such integrated circuit, * -** provided that the above copyright notice and this permission notice * -** appear in all copies, and that the name of Digital Equipment * -** Corporation not be used in advertising or publicity pertaining to * -** distribution of the document or software without specific, written * -** prior permission. * -** * -** Digital Equipment Corporation disclaims all warranties and/or * -** guarantees with regard to this software, including all implied * -** warranties of fitness for a particular purpose and merchantability, * -** and makes no representations regarding the use of, or the results * -** of the use of, the software and documentation in terms of correctness, * -** accuracy, reliability, currentness or otherwise; and you rely on * -** the software, documentation and results solely at your own risk. * -** * -** AXP is a trademark of Digital Equipment Corporation. * -** * -***************************************************************************** -** -** FACILITY: -** -** DECchip 21164 PALcode -** -** MODULE: -** -** osf.h -** -** MODULE DESCRIPTION: -** -** OSF/1 specific definitions -** -** AUTHOR: ER -** -** CREATION DATE: 24-Nov-1993 -** -** $Id: osf.h,v 1.1.1.1 1997/10/30 23:27:19 verghese Exp $ -** -** MODIFICATION HISTORY: -** -** $Log: osf.h,v $ -** Revision 1.1.1.1 1997/10/30 23:27:19 verghese -** current 10/29/97 -** -** Revision 1.11 1995/04/21 02:06:30 fdh -** Replaced C++ style comments with Standard C style comments. -** -** Revision 1.10 1994/09/26 14:17:47 samberg -** Complete VICE work and EB164/SD164 breakout. -** -** Revision 1.9 1994/07/26 17:39:10 samberg -** Changes for SD164. -** -** Revision 1.8 1994/07/08 17:03:48 samberg -** Changes to support platform specific additions -** -** Revision 1.7 1994/05/20 19:23:51 ericr -** Moved STACK_FRAME macro from osfpal.s to here -** -** Revision 1.6 1994/05/20 18:08:19 ericr -** Changed line comments to C++ style comment character -** -** Revision 1.5 1994/01/11 18:43:33 ericr -** Removed PAL version/revision and size constants -** -** Revision 1.4 1994/01/05 16:22:32 ericr -** Added more SCB vector offsets and MCHK error code -** -** Revision 1.3 1994/01/03 19:35:40 ericr -** Derive mask definitions from field constants -** -** Revision 1.2 1993/12/22 20:43:01 eric -** Added mask definitions for MCES bits -** -** Revision 1.1 1993/12/16 21:55:05 eric -** Initial revision -** -** -**-- -*/ - -/* -** Seg0 and Seg1 Virtual Address (VA) Format -** -** Loc Size Name Function -** ----- ---- ---- --------------------------------- -** <42:33> 10 SEG1 First level page table offset -** <32:23> 10 SEG2 Second level page table offset -** <22:13> 10 SEG3 Third level page table offset -** <12:00> 13 OFFSET Byte within page offset -*/ - -#define VA_V_SEG1 33 -#define VA_M_SEG1 (0x3FF< 32 PFN Page Frame Number -** <31:16> 16 SW Reserved for software -** <15:14> 2 RSV0 Reserved for hardware SBZ -** <13> 1 UWE User Write Enable -** <12> 1 KWE Kernel Write Enable -** <11:10> 2 RSV1 Reserved for hardware SBZ -** <9> 1 URE User Read Enable -** <8> 1 KRE Kernel Read Enable -** <7> 1 RSV2 Reserved for hardware SBZ -** <6:5> 2 GH Granularity Hint -** <4> 1 ASM Address Space Match -** <3> 1 FOE Fault On Execute -** <2> 1 FOW Fault On Write -** <1> 1 FOR Fault On Read -** <0> 1 V Valid -*/ - -#define PTE_V_PFN 32 -#define PTE_M_PFN 0xFFFFFFFF00000000 -#define PTE_V_SW 16 -#define PTE_M_SW 0x00000000FFFF0000 -#define PTE_V_UWE 13 -#define PTE_M_UWE (1< 1 CM Current Mode -** <2:0> 3 IPL Interrupt Priority Level -**/ - -#define PS_V_CM 3 -#define PS_M_CM (1< 1 MIP Machine check in progress -** <1> 1 SCE System correctable error in progress -** <2> 1 PCE Processor correctable error in progress -** <3> 1 DPC Disable PCE error reporting -** <4> 1 DSC Disable SCE error reporting -*/ - -#define MCES_V_MIP 0 -#define MCES_M_MIP (1< 8 ID Who-Am-I identifier -** <15:8> 1 SWAP Swap PALcode flag - character 'S' -*/ - -#define WHAMI_V_SWAP 8 -#define WHAMI_M_SWAP (1<