From 49ac143dfb97cc28f3dfb3b61eb9724259d3a3a3 Mon Sep 17 00:00:00 2001 From: Nathan Froyd Date: Tue, 15 Feb 2011 12:44:31 +0000 Subject: [PATCH] make frv use constraints.md make frv use constraints.md * config/frv/constraints.md: New file. * config/frv/predicates.md: Include it. * config/frv/frv.c (reg_class_from_letter): Delete. (frv_option_override): Don't initialize it. * config/frv/frv.h (REG_CLASS_FROM_LETTER): Delete. (CONST_OK_FOR_I, CONST_OK_FOR_J, CONST_OK_FOR_K): Delete. (CONST_OK_FOR_L, CONST_OK_FOR_M, CONST_OK_FOR_N): Delete. (CONST_OK_FOR_O, CONST_OK_FOR_P, CONST_OK_FOR_LETTER_P): Delete. (CONST_DOUBLE_OK_FOR_G, CONST_DOUBLE_OK_FOR_H): Delete. (CONST_DOUBLE_OK_FOR_LETTER_P): Delete. (EXTRA_CONSTRAINT_FOR_Q, EXTRA_CONSTRAINT_FOR_R): Delete. (EXTRA_CONSTRAINT_FOR_S, EXTRA_CONSTRAINT_FOR_T): Delete. (EXTRA_CONSTRAINT_FOR_U, EXTRA_CONSTRAINT): Delete. (EXTRA_MEMORY_CONSTRAINT, CONSTRAINT_LEN): Delete. (REG_CLASS_FROM_CONSTRAINT): Delete. From-SVN: r170171 --- gcc/ChangeLog | 18 ++++ gcc/config/frv/constraints.md | 174 ++++++++++++++++++++++++++++++++++ gcc/config/frv/frv.c | 45 --------- gcc/config/frv/frv.h | 137 -------------------------- gcc/config/frv/frv.md | 1 + 5 files changed, 193 insertions(+), 182 deletions(-) create mode 100644 gcc/config/frv/constraints.md diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3b325da7451..0db9e5504eb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,21 @@ +2011-02-15 Nathan Froyd + + * config/frv/constraints.md: New file. + * config/frv/predicates.md: Include it. + * config/frv/frv.c (reg_class_from_letter): Delete. + (frv_option_override): Don't initialize it. + * config/frv/frv.h (REG_CLASS_FROM_LETTER): Delete. + (CONST_OK_FOR_I, CONST_OK_FOR_J, CONST_OK_FOR_K): Delete. + (CONST_OK_FOR_L, CONST_OK_FOR_M, CONST_OK_FOR_N): Delete. + (CONST_OK_FOR_O, CONST_OK_FOR_P, CONST_OK_FOR_LETTER_P): Delete. + (CONST_DOUBLE_OK_FOR_G, CONST_DOUBLE_OK_FOR_H): Delete. + (CONST_DOUBLE_OK_FOR_LETTER_P): Delete. + (EXTRA_CONSTRAINT_FOR_Q, EXTRA_CONSTRAINT_FOR_R): Delete. + (EXTRA_CONSTRAINT_FOR_S, EXTRA_CONSTRAINT_FOR_T): Delete. + (EXTRA_CONSTRAINT_FOR_U, EXTRA_CONSTRAINT): Delete. + (EXTRA_MEMORY_CONSTRAINT, CONSTRAINT_LEN): Delete. + (REG_CLASS_FROM_CONSTRAINT): Delete. + 2011-02-15 Jakub Jelinek PR middle-end/47581 diff --git a/gcc/config/frv/constraints.md b/gcc/config/frv/constraints.md new file mode 100644 index 00000000000..792706b0333 --- /dev/null +++ b/gcc/config/frv/constraints.md @@ -0,0 +1,174 @@ +;; Constraint definitions for FRV. +;; Copyright (C) 2001 Free Software Foundation, Inc. +;; +;; This file is part of GCC. +;; +;; GCC is free software; you can redistribute it and/or modify +;; it under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 3, or (at your option) +;; any later version. +;; +;; GCC is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. +;; +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; . + +;; Register constraints. +(define_register_constraint "a" "ACC_REGS" + "@internal") + +(define_register_constraint "b" "EVEN_ACC_REGS" + "@internal") + +(define_register_constraint "c" "CC_REGS" + "@internal") + +(define_register_constraint "d" "GPR_REGS" + "@internal") + +(define_register_constraint "e" "EVEN_REGS" + "@internal") + +(define_register_constraint "f" "FPR_REGS" + "@internal") + +(define_register_constraint "h" "FEVEN_REGS" + "@internal") + +(define_register_constraint "l" "LR_REG" + "@internal") + +(define_register_constraint "q" "QUAD_REGS" + "@internal") + +(define_register_constraint "t" "ICC_REGS" + "@internal") + +(define_register_constraint "u" "FCC_REGS" + "@internal") + +(define_register_constraint "v" "ICR_REGS" + "@internal") + +(define_register_constraint "w" "FCR_REGS" + "@internal") + +(define_register_constraint "x" "QUAD_FPR_REGS" + "@internal") + +(define_register_constraint "y" "LCR_REG" + "@internal") + +(define_register_constraint "z" "SPR_REGS" + "@internal") + +(define_register_constraint "A" "QUAD_ACC_REGS" + "@internal") + +(define_register_constraint "B" "ACCG_REGS" + "@internal") + +(define_register_constraint "C" "CR_REGS" + "@internal") + +(define_register_constraint "D89" "GR89_REGS" + "@internal") + +(define_register_constraint "D09" "GR9_REGS" + "@internal") + +(define_register_constraint "D08" "GR8_REGS" + "@internal") + +(define_register_constraint "D14" "FDPIC_FPTR_REGS" + "@internal") + +(define_register_constraint "D15" "FDPIC_REGS" + "@internal") + +(define_register_constraint "W" "FDPIC_CALL_REGS" + "@internal") + +(define_register_constraint "Z" "FDPIC_REGS" + "@internal") + +;; Integer constraints. +(define_constraint "I" + "A signed 6-bit immediate." + (and (match_code "const_int") + (match_test "IN_RANGE (ival, -32, 31)"))) + +(define_constraint "J" + "A signed 10-bit immediate." + (and (match_code "const_int") + (match_test "IN_RANGE (ival, -512, 511)"))) + +(define_constraint "K" + "@internal" + ;; Unused. + (and (match_code "const_int") + (match_test "0"))) + +(define_constraint "L" + "A signed 16-bit immediate." + (and (match_code "const_int") + (match_test "IN_RANGE (ival, -32768, 32767)"))) + +(define_constraint "M" + "An unsigned 16-bit immediate." + (and (match_code "const_int") + (match_test "IN_RANGE (ival, 0, 65535)"))) + +(define_constraint "N" + "A signed 12-bit immediate that is negative." + (and (match_code "const_int") + (match_test "IN_RANGE (ival, -2048, -1)"))) + +(define_constraint "O" + "Zero." + (and (match_code "const_int") + (match_test "ival == 0"))) + +(define_constraint "P" + "A signed 12-bit immediate that is positive." + (and (match_code "const_int") + (match_test "IN_RANGE (ival, 1, 2047)"))) + +;; Floating-point constraints. +(define_constraint "G" + "Floating-point zero." + (and (match_code "const_double") + (ior (and (match_test "mode == VOIDmode") + (match_test "hval == 0 && lval == 0")) + (and (match_test "mode == SFmode || mode == DFmode") + (match_test "op == CONST0_RTX (mode)"))))) + +(define_constraint "H" + "@internal" + ;; Unused. + (and (match_code "const_double") + (match_test "0"))) + +(define_constraint "Q" + "12-bit relocations." + (match_test "got12_operand (op, mode)")) + +(define_memory_constraint "R" + "Double word memory ops that take one instruction." + (match_test "dbl_memory_one_insn_operand (op, mode)")) + +(define_constraint "S" + "SYMBOL_REF." + (match_test "CONSTANT_P (op) && call_operand (op, VOIDmode)")) + +(define_memory_constraint "T" + "Double word memory ops that take two instructions." + (match_test "dbl_memory_two_insn_operand (op, mode)")) + +(define_memory_constraint "U" + "Memory operand for conditional execution." + (match_test "condexec_memory_operand (op, mode)")) diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c index 0f59265532e..229b9feb735 100644 --- a/gcc/config/frv/frv.c +++ b/gcc/config/frv/frv.c @@ -252,9 +252,6 @@ static /* GTY(()) */ frv_ifcvt_t frv_ifcvt; /* Map register number to smallest register class. */ enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER]; -/* Map class letter into register class. */ -enum reg_class reg_class_from_letter[256]; - /* Cached value of frv_stack_info. */ static frv_stack_t *frv_stack_cache = (frv_stack_t *)0; @@ -809,48 +806,6 @@ frv_option_override (void) if (!global_options_set.x_g_switch_value && !TARGET_LIBPIC) g_switch_value = SDATA_DEFAULT_SIZE; - /* A C expression which defines the machine-dependent operand - constraint letters for register classes. If CHAR is such a - letter, the value should be the register class corresponding to - it. Otherwise, the value should be `NO_REGS'. The register - letter `r', corresponding to class `GENERAL_REGS', will not be - passed to this macro; you do not need to handle it. - - The following letters are unavailable, due to being used as - constraints: - '0'..'9' - '<', '>' - 'E', 'F', 'G', 'H' - 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P' - 'Q', 'R', 'S', 'T', 'U' - 'V', 'X' - 'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */ - - for (i = 0; i < 256; i++) - reg_class_from_letter[i] = NO_REGS; - - reg_class_from_letter['a'] = ACC_REGS; - reg_class_from_letter['b'] = EVEN_ACC_REGS; - reg_class_from_letter['c'] = CC_REGS; - reg_class_from_letter['d'] = GPR_REGS; - reg_class_from_letter['e'] = EVEN_REGS; - reg_class_from_letter['f'] = FPR_REGS; - reg_class_from_letter['h'] = FEVEN_REGS; - reg_class_from_letter['l'] = LR_REG; - reg_class_from_letter['q'] = QUAD_REGS; - reg_class_from_letter['t'] = ICC_REGS; - reg_class_from_letter['u'] = FCC_REGS; - reg_class_from_letter['v'] = ICR_REGS; - reg_class_from_letter['w'] = FCR_REGS; - reg_class_from_letter['x'] = QUAD_FPR_REGS; - reg_class_from_letter['y'] = LCR_REG; - reg_class_from_letter['z'] = SPR_REGS; - reg_class_from_letter['A'] = QUAD_ACC_REGS; - reg_class_from_letter['B'] = ACCG_REGS; - reg_class_from_letter['C'] = CR_REGS; - reg_class_from_letter['W'] = FDPIC_CALL_REGS; /* gp14+15 */ - reg_class_from_letter['Z'] = FDPIC_REGS; /* gp15 */ - /* There is no single unaligned SI op for PIC code. Sometimes we need to use ".4byte" and sometimes we need to use ".picptr". See frv_assemble_integer for details. */ diff --git a/gcc/config/frv/frv.h b/gcc/config/frv/frv.h index f3d6a4863ba..299a85676ba 100644 --- a/gcc/config/frv/frv.h +++ b/gcc/config/frv/frv.h @@ -1003,25 +1003,6 @@ extern enum reg_class regno_reg_class[]; (as well as added to a displacement). */ #define INDEX_REG_CLASS GPR_REGS -/* A C expression which defines the machine-dependent operand constraint - letters for register classes. If CHAR is such a letter, the value should be - the register class corresponding to it. Otherwise, the value should be - `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS', - will not be passed to this macro; you do not need to handle it. - - The following letters are unavailable, due to being used as - constraints: - '0'..'9' - '<', '>' - 'E', 'F', 'G', 'H' - 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P' - 'Q', 'R', 'S', 'T', 'U' - 'V', 'X' - 'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */ - -extern enum reg_class reg_class_from_letter[]; -#define REG_CLASS_FROM_LETTER(CHAR) reg_class_from_letter [(unsigned char)(CHAR)] - /* A C expression which is nonzero if register number NUM is suitable for use as a base register in operand addresses. It may be either a suitable hard register or a pseudo register that has been allocated such a hard register. */ @@ -1067,124 +1048,6 @@ extern enum reg_class reg_class_from_letter[]; #define ZERO_P(x) (x == CONST0_RTX (GET_MODE (x))) -/* 6-bit signed immediate. */ -#define CONST_OK_FOR_I(VALUE) IN_RANGE (VALUE, -32, 31) -/* 10-bit signed immediate. */ -#define CONST_OK_FOR_J(VALUE) IN_RANGE (VALUE, -512, 511) -/* Unused */ -#define CONST_OK_FOR_K(VALUE) 0 -/* 16-bit signed immediate. */ -#define CONST_OK_FOR_L(VALUE) IN_RANGE (VALUE, -32768, 32767) -/* 16-bit unsigned immediate. */ -#define CONST_OK_FOR_M(VALUE) IN_RANGE (VALUE, 0, 65535) -/* 12-bit signed immediate that is negative. */ -#define CONST_OK_FOR_N(VALUE) IN_RANGE (VALUE, -2048, -1) -/* Zero */ -#define CONST_OK_FOR_O(VALUE) ((VALUE) == 0) -/* 12-bit signed immediate that is negative. */ -#define CONST_OK_FOR_P(VALUE) IN_RANGE (VALUE, 1, 2047) - -/* A C expression that defines the machine-dependent operand constraint letters - (`I', `J', `K', .. 'P') that specify particular ranges of integer values. - If C is one of those letters, the expression should check that VALUE, an - integer, is in the appropriate range and return 1 if so, 0 otherwise. If C - is not one of those letters, the value should be 0 regardless of VALUE. */ -#define CONST_OK_FOR_LETTER_P(VALUE, C) \ - ( (C) == 'I' ? CONST_OK_FOR_I (VALUE) \ - : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \ - : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \ - : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \ - : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \ - : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \ - : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \ - : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \ - : 0) - - -/* A C expression that defines the machine-dependent operand constraint letters - (`G', `H') that specify particular ranges of `const_double' values. - - If C is one of those letters, the expression should check that VALUE, an RTX - of code `const_double', is in the appropriate range and return 1 if so, 0 - otherwise. If C is not one of those letters, the value should be 0 - regardless of VALUE. - - `const_double' is used for all floating-point constants and for `DImode' - fixed-point constants. A given letter can accept either or both kinds of - values. It can use `GET_MODE' to distinguish between these kinds. */ - -#define CONST_DOUBLE_OK_FOR_G(VALUE) \ - ((GET_MODE (VALUE) == VOIDmode \ - && CONST_DOUBLE_LOW (VALUE) == 0 \ - && CONST_DOUBLE_HIGH (VALUE) == 0) \ - || ((GET_MODE (VALUE) == SFmode \ - || GET_MODE (VALUE) == DFmode) \ - && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))) - -#define CONST_DOUBLE_OK_FOR_H(VALUE) 0 - -#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ - ( (C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) \ - : (C) == 'H' ? CONST_DOUBLE_OK_FOR_H (VALUE) \ - : 0) - -/* A C expression that defines the optional machine-dependent constraint - letters (`Q', `R', `S', `T', `U') that can be used to segregate specific - types of operands, usually memory references, for the target machine. - Normally this macro will not be defined. If it is required for a particular - target machine, it should return 1 if VALUE corresponds to the operand type - represented by the constraint letter C. If C is not defined as an extra - constraint, the value returned should be 0 regardless of VALUE. - - For example, on the ROMP, load instructions cannot have their output in r0 - if the memory reference contains a symbolic address. Constraint letter `Q' - is defined as representing a memory address that does *not* contain a - symbolic address. An alternative is specified with a `Q' constraint on the - input and `r' on the output. The next alternative specifies `m' on the - input and a register class that does not include r0 on the output. */ - -/* 12-bit relocations. */ -#define EXTRA_CONSTRAINT_FOR_Q(VALUE) \ - (got12_operand (VALUE, GET_MODE (VALUE))) - -/* Double word memory ops that take one instruction. */ -#define EXTRA_CONSTRAINT_FOR_R(VALUE) \ - (dbl_memory_one_insn_operand (VALUE, GET_MODE (VALUE))) - -/* SYMBOL_REF */ -#define EXTRA_CONSTRAINT_FOR_S(VALUE) \ - (CONSTANT_P (VALUE) && call_operand (VALUE, VOIDmode)) - -/* Double word memory ops that take two instructions. */ -#define EXTRA_CONSTRAINT_FOR_T(VALUE) \ - (dbl_memory_two_insn_operand (VALUE, GET_MODE (VALUE))) - -/* Memory operand for conditional execution. */ -#define EXTRA_CONSTRAINT_FOR_U(VALUE) \ - (condexec_memory_operand (VALUE, GET_MODE (VALUE))) - -#define EXTRA_CONSTRAINT(VALUE, C) \ - ( (C) == 'Q' ? EXTRA_CONSTRAINT_FOR_Q (VALUE) \ - : (C) == 'R' ? EXTRA_CONSTRAINT_FOR_R (VALUE) \ - : (C) == 'S' ? EXTRA_CONSTRAINT_FOR_S (VALUE) \ - : (C) == 'T' ? EXTRA_CONSTRAINT_FOR_T (VALUE) \ - : (C) == 'U' ? EXTRA_CONSTRAINT_FOR_U (VALUE) \ - : 0) - -#define EXTRA_MEMORY_CONSTRAINT(C,STR) \ - ((C) == 'U' || (C) == 'R' || (C) == 'T') - -#define CONSTRAINT_LEN(C, STR) \ - ((C) == 'D' ? 3 : DEFAULT_CONSTRAINT_LEN ((C), (STR))) - -#define REG_CLASS_FROM_CONSTRAINT(C, STR) \ - (((C) == 'D' && (STR)[1] == '8' && (STR)[2] == '9') ? GR89_REGS : \ - ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '9') ? GR9_REGS : \ - ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '8') ? GR8_REGS : \ - ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '4') ? FDPIC_FPTR_REGS : \ - ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '5') ? FDPIC_REGS : \ - REG_CLASS_FROM_LETTER ((C))) - /* Basic Stack Layout. */ diff --git a/gcc/config/frv/frv.md b/gcc/config/frv/frv.md index 47364b1b473..cc4a491417f 100644 --- a/gcc/config/frv/frv.md +++ b/gcc/config/frv/frv.md @@ -1519,6 +1519,7 @@ ;; (include "predicates.md") +(include "constraints.md") ;; :::::::::::::::::::: ;; :: -- 2.30.2