From 49c798e902be6c95ae44422cb05c98e1e8f6f1ca Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 19 Aug 2016 01:37:34 +0200 Subject: [PATCH] radeonsi: disable CE on SI + AMDGPU Reviewed-by: Edward O'Callaghan Reviewed-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_pipe.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 67c3a260ef0..8e7d021b3ae 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -186,7 +186,9 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, sctx->b.gfx.cs = ws->cs_create(sctx->b.ctx, RING_GFX, si_context_gfx_flush, sctx); - if (!(sscreen->b.debug_flags & DBG_NO_CE) && ws->cs_add_const_ib) { + /* SI + AMDGPU + CE = GPU hang */ + if (!(sscreen->b.debug_flags & DBG_NO_CE) && ws->cs_add_const_ib && + sscreen->b.chip_class != SI) { sctx->ce_ib = ws->cs_add_const_ib(sctx->b.gfx.cs); if (!sctx->ce_ib) goto fail; -- 2.30.2