From 49e9dd74169b9622f6a2bd2b79784711579986ab Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 13 Nov 2018 15:52:26 +0000 Subject: [PATCH] whoops missing brackets --- riscv/processor.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/riscv/processor.cc b/riscv/processor.cc index 488a283..bfc5259 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -547,7 +547,7 @@ reg_t processor_t::set_csr(int which, reg_t val, bool csrrwi) state.get_csr_start_end(start, end); uint64_t res_old = 0; // read 2 16-bit entries for RV32, 4 16-bit entries for RV64 - for (int i = 0; i < (xlen == 64) ? 4 : 2; i++) { + for (int i = 0; i < ((xlen == 64) ? 4 : 2); i++) { uint64_t mask = 0xffffUL << (i*16UL); uint64_t svcfg = get_field(v, mask); fprintf(stderr, "SVREG mask %lx cfg %lx\n", mask, svcfg); -- 2.30.2