From 4a78604c99e6261faf235eb01fe86a19ee777746 Mon Sep 17 00:00:00 2001 From: Timothy Hayes Date: Fri, 10 Jan 2020 17:41:38 +0000 Subject: [PATCH] cpu: Add HTM ExecContext API * initiateHtmCmd(Request::Flags flags) * getHtmTransactionUid() * newHtmTransactionUid() * inHtmTransactionalState() * getHtmTransactionalDepth() JIRA: https://gem5.atlassian.net/browse/GEM5-587 Change-Id: I438832a3c47fff1d12d0123425985cfa2150ab40 Signed-off-by: Giacomo Travaglini Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30323 Tested-by: kokoro --- src/cpu/base_dyn_inst.hh | 34 +++++++++++++++++++++++++++++ src/cpu/checker/cpu.hh | 35 +++++++++++++++++++++++++++++ src/cpu/exec_context.hh | 11 ++++++++++ src/cpu/minor/exec_context.hh | 40 ++++++++++++++++++++++++++++++++++ src/cpu/simple/exec_context.hh | 34 +++++++++++++++++++++++++++++ 5 files changed, 154 insertions(+) diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh index b98cbaa53..bab801935 100644 --- a/src/cpu/base_dyn_inst.hh +++ b/src/cpu/base_dyn_inst.hh @@ -300,6 +300,8 @@ class BaseDynInst : public ExecContext, public RefCounted Fault initiateMemRead(Addr addr, unsigned size, Request::Flags flags, const std::vector& byte_enable = std::vector()); + Fault initiateHtmCmd(Request::Flags flags) override; + Fault writeMem(uint8_t *data, unsigned size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector& byte_enable = std::vector()); @@ -539,6 +541,30 @@ class BaseDynInst : public ExecContext, public RefCounted bool isFirstMicroop() const { return staticInst->isFirstMicroop(); } bool isMicroBranch() const { return staticInst->isMicroBranch(); } + uint64_t getHtmTransactionUid() const override + { + panic("Not yet implemented\n"); + return 0; + } + + uint64_t newHtmTransactionUid() const override + { + panic("Not yet implemented\n"); + return 0; + } + + bool inHtmTransactionalState() const override + { + panic("Not yet implemented\n"); + return false; + } + + uint64_t getHtmTransactionalDepth() const override + { + panic("Not yet implemented\n"); + return 0; + } + /** Temporarily sets this instruction as a serialize before instruction. */ void setSerializeBefore() { status.set(SerializeBefore); } @@ -962,6 +988,14 @@ BaseDynInst::initiateMemRead(Addr addr, unsigned size, byte_enable); } +template +Fault +BaseDynInst::initiateHtmCmd(Request::Flags flags) +{ + panic("Not yet implemented\n"); + return NoFault; +} + template Fault BaseDynInst::writeMem(uint8_t *data, unsigned size, Addr addr, diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh index 7d1807e27..4530d4c01 100644 --- a/src/cpu/checker/cpu.hh +++ b/src/cpu/checker/cpu.hh @@ -434,6 +434,41 @@ class CheckerCPU : public BaseCPU, public ExecContext thread->setMemAccPredicate(val); } + uint64_t + getHtmTransactionUid() const override + { + panic("not yet supported!"); + return 0; + }; + + uint64_t + newHtmTransactionUid() const override + { + panic("not yet supported!"); + return 0; + }; + + Fault + initiateHtmCmd(Request::Flags flags) override + { + panic("not yet supported!"); + return NoFault; + } + + bool + inHtmTransactionalState() const override + { + panic("not yet supported!"); + return false; + } + + uint64_t + getHtmTransactionalDepth() const override + { + panic("not yet supported!"); + return 0; + } + TheISA::PCState pcState() const override { return thread->pcState(); } void pcState(const TheISA::PCState &val) override diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh index 418019199..cfef3c3c9 100644 --- a/src/cpu/exec_context.hh +++ b/src/cpu/exec_context.hh @@ -252,6 +252,11 @@ class ExecContext { panic("ExecContext::initiateMemRead() should be overridden\n"); } + /** + * Initiate an HTM command, + * e.g. tell Ruby we're starting/stopping a transaction + */ + virtual Fault initiateHtmCmd(Request::Flags flags) = 0; /** * For atomic-mode contexts, perform an atomic memory write operation. * For timing-mode contexts, initiate a timing memory write operation. @@ -320,6 +325,12 @@ class ExecContext { virtual bool readMemAccPredicate() const = 0; virtual void setMemAccPredicate(bool val) = 0; + // hardware transactional memory + virtual uint64_t newHtmTransactionUid() const = 0; + virtual uint64_t getHtmTransactionUid() const = 0; + virtual bool inHtmTransactionalState() const = 0; + virtual uint64_t getHtmTransactionalDepth() const = 0; + /** @} */ /** diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh index e65fdfb14..81675e604 100644 --- a/src/cpu/minor/exec_context.hh +++ b/src/cpu/minor/exec_context.hh @@ -113,6 +113,13 @@ class ExecContext : public ::ExecContext size, addr, flags, nullptr, nullptr, byte_enable); } + Fault + initiateHtmCmd(Request::Flags flags) override + { + panic("ExecContext::initiateHtmCmd() not implemented on MinorCPU\n"); + return NoFault; + } + Fault writeMem(uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res, @@ -333,6 +340,39 @@ class ExecContext : public ::ExecContext thread.setMemAccPredicate(val); } + // hardware transactional memory + uint64_t + getHtmTransactionUid() const override + { + panic("ExecContext::getHtmTransactionUid() not" + "implemented on MinorCPU\n"); + return 0; + } + + uint64_t + newHtmTransactionUid() const override + { + panic("ExecContext::newHtmTransactionUid() not" + "implemented on MinorCPU\n"); + return 0; + } + + bool + inHtmTransactionalState() const override + { + // ExecContext::inHtmTransactionalState() not + // implemented on MinorCPU + return false; + } + + uint64_t + getHtmTransactionalDepth() const override + { + panic("ExecContext::getHtmTransactionalDepth() not" + "implemented on MinorCPU\n"); + return 0; + } + TheISA::PCState pcState() const override { diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh index 5214211ba..41e1d3dd1 100644 --- a/src/cpu/simple/exec_context.hh +++ b/src/cpu/simple/exec_context.hh @@ -473,6 +473,12 @@ class SimpleExecContext : public ExecContext { return cpu->initiateMemAMO(addr, size, flags, std::move(amo_op)); } + Fault initiateHtmCmd(Request::Flags flags) override + { + panic("Not yet supported\n"); + return NoFault; + } + /** * Sets the number of consecutive store conditional failures. */ @@ -527,6 +533,34 @@ class SimpleExecContext : public ExecContext { thread->setMemAccPredicate(val); } + uint64_t + getHtmTransactionUid() const override + { + panic("Not yet supported\n"); + return 0; + } + + uint64_t + newHtmTransactionUid() const override + { + panic("Not yet supported\n"); + return 0; + } + + bool + inHtmTransactionalState() const override + { + panic("Not yet supported\n"); + return false; + } + + uint64_t + getHtmTransactionalDepth() const override + { + panic("Not yet supported\n"); + return 0; + } + /** * Invalidate a page in the DTLB and ITLB. */ -- 2.30.2