From 4a7cf8f66ff5d7e15ae7f8f5542f27bc72c68709 Mon Sep 17 00:00:00 2001 From: Christoph Bumiller Date: Sat, 23 May 2009 12:22:30 +0200 Subject: [PATCH] nv50: set dst.z,w to 0,1 in SCS and XPD According to tgsi-instruction-set.txt, if they are written, z and w should be set to 0 and 1 respectively in SCS, and w to 1.0 in XPD. --- src/gallium/drivers/nv50/nv50_program.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c index 6aec9cc8414..877ead39ce8 100644 --- a/src/gallium/drivers/nv50/nv50_program.c +++ b/src/gallium/drivers/nv50/nv50_program.c @@ -438,6 +438,14 @@ emit_mov(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src) emit(pc, e); } +static INLINE void +emit_mov_immdval(struct nv50_pc *pc, struct nv50_reg *dst, float f) +{ + struct nv50_reg *imm = alloc_immd(pc, f); + emit_mov(pc, dst, imm); + FREE(imm); +} + static boolean check_swap_src_0_1(struct nv50_pc *pc, struct nv50_reg **s0, struct nv50_reg **s1) @@ -1190,6 +1198,10 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) emit_flop(pc, 5, dst[0], temp); if (mask & (1 << 1)) emit_flop(pc, 4, dst[1], temp); + if (mask & (1 << 2)) + emit_mov_immdval(pc, dst[2], 0.0); + if (mask & (1 << 3)) + emit_mov_immdval(pc, dst[3], 1.0); break; case TGSI_OPCODE_SGE: for (c = 0; c < 4; c++) { @@ -1262,6 +1274,8 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) emit_mul(pc, temp, src[0][1], src[1][0]); emit_msb(pc, dst[2], src[0][0], src[1][1], temp); } + if (mask & (1 << 3)) + emit_mov_immdval(pc, dst[3], 1.0); break; case TGSI_OPCODE_END: break; -- 2.30.2