From 4a92c76a125bfbd65a50df7ed00c3c41af0f17a1 Mon Sep 17 00:00:00 2001
From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Mon, 29 May 2023 01:04:55 +0300
Subject: [PATCH] ppc/svp64: support fmvis instruction

---
 gas/testsuite/gas/ppc/fmvis.d | 12 ++++++++++++
 gas/testsuite/gas/ppc/fmvis.s |  4 ++++
 gas/testsuite/gas/ppc/ppc.exp |  1 +
 opcodes/ppc-opc.c             |  2 ++
 4 files changed, 19 insertions(+)
 create mode 100644 gas/testsuite/gas/ppc/fmvis.d
 create mode 100644 gas/testsuite/gas/ppc/fmvis.s

diff --git a/gas/testsuite/gas/ppc/fmvis.d b/gas/testsuite/gas/ppc/fmvis.d
new file mode 100644
index 00000000000..2251852a048
--- /dev/null
+++ b/gas/testsuite/gas/ppc/fmvis.d
@@ -0,0 +1,12 @@
+#as: -mlibresoc
+#objdump: -dr -Mlibresoc
+
+.*:     file format .*
+
+
+Disassembly of section \.text:
+0+ <\.text>:
+.*:\s+(06 00 00 58|58 00 00 06)\s+fmvis\s+f0,0
+.*:\s+(06 00 e0 5b|5b e0 00 06)\s+fmvis\s+f31,0
+.*:\s+(c7 7f 1f 58|58 1f 7f c7)\s+fmvis\s+f0,32767
+.*:\s+(06 80 00 58|58 00 80 06)\s+fmvis\s+f0,-32768
diff --git a/gas/testsuite/gas/ppc/fmvis.s b/gas/testsuite/gas/ppc/fmvis.s
new file mode 100644
index 00000000000..ab15b166086
--- /dev/null
+++ b/gas/testsuite/gas/ppc/fmvis.s
@@ -0,0 +1,4 @@
+fmvis 0, 0
+fmvis 31, 0
+fmvis 0, 32767
+fmvis 0, -32768
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index 689503d7c20..053a73ac401 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -161,3 +161,4 @@ run_dump_test "svstep"
 run_dump_test "svshape"
 run_dump_test "svremap"
 run_dump_test "svindex"
+run_dump_test "fmvis"
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 8afd12faff9..8366931a285 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -7016,6 +7016,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 {"rlmi",	M(22,0),	M_MASK,	     M601,	PPCVLE,		{RA, RS, RB, MBE, ME}},
 {"rlmi.",	M(22,1),	M_MASK,	     M601,	PPCVLE,		{RA, RS, RB, MBE, ME}},
 
+{"fmvis",	DX(22,3),	DX_MASK,	SVP64,	PPCVLE,	{FRS, DXD}},
+
 {"svstep",	SVL(22,19,0),	SVL_MASK,	SVP64,	PPCVLE,	{RT, SVi, vf}},
 {"svstep.",	SVL(22,19,1),	SVL_MASK,	SVP64,	PPCVLE,	{RT, SVi, vf}},
 
-- 
2.30.2