From 4aa5fd8aca1140adf0917dc53397efddc7fd4c11 Mon Sep 17 00:00:00 2001 From: Dragan Mladjenovic Date: Tue, 19 Nov 2019 18:14:32 +0000 Subject: [PATCH] [MIPS] Prevent MSA branches from being put into delay slots This patch tightens the instruction definitions to make sure that MSA branch instructions cannot be put into delay slots and have their delay slots eligible for being filled. Also, MSA *div*3 patterns use MSA branches for zero checks but are not marked as being multi instruction and thus could be put into delay slots. This patch fixes that. gcc/ChangeLog: 2019-11-19 Zoran Jovanovic Dragan Mladjenovic * config/mips/mips-msa.md (msa__, msa__v_): Mark as not having "likely" version. * config/mips/mips.md (insn_count): The simd_div instruction with TARGET_CHECK_ZERO_DIV consists of 3 instructions. (can_delay): Exclude simd_branch. (defile_delay *): Add simd_branch instructions. They have one regular delay slot. gcc/testsuite/ChangeLog: 2019-11-19 Dragan Mladjenovic * gcc.target/mips/msa-ds.c: New test. From-SVN: r278458 --- gcc/ChangeLog | 11 +++++++++ gcc/config/mips/mips-msa.md | 6 +++-- gcc/config/mips/mips.md | 10 +++++++-- gcc/testsuite/ChangeLog | 4 ++++ gcc/testsuite/gcc.target/mips/msa-ds.c | 31 ++++++++++++++++++++++++++ 5 files changed, 58 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/mips/msa-ds.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b36834bf475..3516235f606 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2019-11-19 Zoran Jovanovic + Dragan Mladjenovic + + * config/mips/mips-msa.md (msa__, msa__v_): + Mark as not having "likely" version. + * config/mips/mips.md (insn_count): The simd_div instruction with + TARGET_CHECK_ZERO_DIV consists of 3 instructions. + (can_delay): Exclude simd_branch. + (defile_delay *): Add simd_branch instructions. + They have one regular delay slot. + 2019-11-19 Martin Liska * toplev.c (general_init): Move the call... diff --git a/gcc/config/mips/mips-msa.md b/gcc/config/mips/mips-msa.md index 628423d71ae..100cf99c22d 100644 --- a/gcc/config/mips/mips-msa.md +++ b/gcc/config/mips/mips-msa.md @@ -2719,7 +2719,8 @@ } [(set_attr "type" "simd_branch") (set_attr "mode" "") - (set_attr "compact_form" "never")]) + (set_attr "compact_form" "never") + (set_attr "branch_likely" "no")]) (define_insn "msa__v_" [(set (pc) (if_then_else @@ -2738,4 +2739,5 @@ } [(set_attr "type" "simd_branch") (set_attr "mode" "TI") - (set_attr "compact_form" "never")]) + (set_attr "compact_form" "never") + (set_attr "branch_likely" "no")]) diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 4de97318e67..929e3684908 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -560,6 +560,12 @@ (eq_attr "type" "idiv,idiv3") (symbol_ref "mips_idiv_insns (GET_MODE (PATTERN (insn)))") + ;; simd div have 3 instruction if TARGET_CHECK_ZERO_DIV is true. + (eq_attr "type" "simd_div") + (if_then_else (match_test "TARGET_CHECK_ZERO_DIV") + (const_int 3) + (const_int 1)) + (not (eq_attr "sync_mem" "none")) (symbol_ref "mips_sync_loop_insns (insn, operands)")] (const_int 1))) @@ -759,7 +765,7 @@ ;; Can the instruction be put into a delay slot? (define_attr "can_delay" "no,yes" - (if_then_else (and (eq_attr "type" "!branch,call,jump") + (if_then_else (and (eq_attr "type" "!branch,call,jump,simd_branch") (eq_attr "hazard" "none") (match_test "get_attr_insn_count (insn) == 1")) (const_string "yes") @@ -1098,7 +1104,7 @@ ;; Branches that have delay slots and don't have likely variants do ;; not annul on false. -(define_delay (and (eq_attr "type" "branch") +(define_delay (and (eq_attr "type" "branch,simd_branch") (not (match_test "TARGET_MIPS16")) (ior (match_test "TARGET_CB_NEVER") (and (eq_attr "compact_form" "maybe") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 32d62238100..fc275fa0a7f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2019-11-19 Dragan Mladjenovic + + * gcc.target/mips/msa-ds.c: New test. + 2019-11-19 Richard Sandiford gcc/ Revert: diff --git a/gcc/testsuite/gcc.target/mips/msa-ds.c b/gcc/testsuite/gcc.target/mips/msa-ds.c new file mode 100644 index 00000000000..c6932b280cb --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/msa-ds.c @@ -0,0 +1,31 @@ +/* { dg-options "-mmsa -mfp64 -mhard-float" } */ +/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */ + +/* Check that delay slots for MSA branches are filled. */ + +typedef unsigned v4si __attribute__ ((vector_size (16))); + +int __attribute__ ((cold)) foo (v4si v , int a, int b) +{ + int c = 0xf0f0f0f0; + int f = __builtin_msa_bnz_w (v); + + if (f) + return a + c; + else + return b + c; +} + +int __attribute__ ((cold)) bar (v4si v , int a, int b) +{ + int c = 0xf0f0f0f0; + int f = __builtin_msa_bz_w (v); + + if (f) + return a + c; + else + return b + c; +} + +/* { dg-final { scan-assembler-not "foo:.*nop.*jr.*foo," } } */ +/* { dg-final { scan-assembler-not "bar:.*nop.*jr.*bar," } } */ -- 2.30.2