From 4b1d1acb1a9a49cf53ec24b13fcd78fa7933ac01 Mon Sep 17 00:00:00 2001 From: Dmitry Selyutin Date: Sun, 11 Sep 2022 21:15:52 +0300 Subject: [PATCH] power_insn: support BRANCH and CR mode stubs --- src/openpower/decoder/power_insn.py | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py index 9034f37c..c07e53e7 100644 --- a/src/openpower/decoder/power_insn.py +++ b/src/openpower/decoder/power_insn.py @@ -1435,7 +1435,13 @@ class SVP64Instruction(PrefixedInstruction): mode = self.prefix.rm.mode sel = mode.sel - if record.svp64.mode is _SVMode.NORMAL: + if record.svp64.mode is _SVMode.BRANCH: + return (self.prefix.rm.mode, "branch") + + elif record.svp64.mode is _SVMode.CROP: + return (self.prefix.rm.mode, "crop") + + elif record.svp64.mode is _SVMode.NORMAL: mode = mode.normal if sel == 0b00: if mode[2] == 0b0: @@ -1532,9 +1538,6 @@ class SVP64Instruction(PrefixedInstruction): if isinstance(mode, cls): return (mode, desc) - if record.svp64.mode is _SVMode.BRANCH: - return (self.prefix.rm.mode, "branch") - raise ValueError(self) def disassemble(self, db, -- 2.30.2