From 4b1e70cc57d7ff5f465544644b2180dee1490cee Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Mon, 13 Nov 2017 20:13:09 -0800 Subject: [PATCH] i965: Switch over to fully external-or-not MOCS scheme Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_blorp.c | 17 +--------------- src/mesa/drivers/dri/i965/brw_state.h | 3 +++ .../drivers/dri/i965/brw_wm_surface_state.c | 20 +++++++------------ 3 files changed, 11 insertions(+), 29 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 626bf44caad..38284d3b855 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -114,20 +114,6 @@ brw_blorp_init(struct brw_context *brw) brw->blorp.upload_shader = brw_blorp_upload_shader; } -static uint32_t wb_mocs[] = { - [7] = GEN7_MOCS_L3, - [8] = BDW_MOCS_WB, - [9] = SKL_MOCS_WB, - [10] = CNL_MOCS_WB, -}; - -static uint32_t pte_mocs[] = { - [7] = GEN7_MOCS_L3, - [8] = BDW_MOCS_PTE, - [9] = SKL_MOCS_PTE, - [10] = CNL_MOCS_PTE, -}; - static void blorp_surf_for_miptree(struct brw_context *brw, struct blorp_surf *surf, @@ -158,8 +144,7 @@ blorp_surf_for_miptree(struct brw_context *brw, .buffer = mt->bo, .offset = mt->offset, .reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0, - .mocs = (is_render_target || mt->bo->external) ? pte_mocs[devinfo->gen] : - wb_mocs[devinfo->gen], + .mocs = brw_get_bo_mocs(devinfo, mt->bo), }; surf->aux_usage = aux_usage; diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index 927e77920ef..397dfc9aa50 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -392,6 +392,9 @@ void gen10_init_atoms(struct brw_context *brw); /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */ #define CNL_MOCS_PTE (1 << 1) +uint32_t brw_get_bo_mocs(const struct gen_device_info *devinfo, + struct brw_bo *bo); + #ifdef __cplusplus } #endif diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 49316dcb48d..42ee9a1b252 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -69,8 +69,8 @@ uint32_t pte_mocs[] = { [10] = CNL_MOCS_PTE, }; -static uint32_t -get_tex_mocs(const struct gen_device_info *devinfo, struct brw_bo *bo) +uint32_t +brw_get_bo_mocs(const struct gen_device_info *devinfo, struct brw_bo *bo) { return (bo && bo->external ? pte_mocs : wb_mocs)[devinfo->gen]; } @@ -134,9 +134,10 @@ brw_emit_surface_state(struct brw_context *brw, struct intel_mipmap_tree *mt, GLenum target, struct isl_view view, enum isl_aux_usage aux_usage, - uint32_t mocs, uint32_t *surf_offset, int surf_index, + uint32_t *surf_offset, int surf_index, unsigned reloc_flags) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; uint32_t tile_x = mt->level[0].level_x; uint32_t tile_y = mt->level[0].level_y; uint32_t offset = mt->offset; @@ -187,7 +188,8 @@ brw_emit_surface_state(struct brw_context *brw, mt->bo, offset, reloc_flags), .aux_surf = aux_surf, .aux_usage = aux_usage, .aux_address = aux_offset, - .mocs = mocs, .clear_color = clear_color, + .mocs = brw_get_bo_mocs(devinfo, mt->bo), + .clear_color = clear_color, .x_offset_sa = tile_x, .y_offset_sa = tile_y); if (aux_surf) { /* On gen7 and prior, the upper 20 bits of surface state DWORD 6 are the @@ -214,7 +216,6 @@ gen6_update_renderbuffer_surface(struct brw_context *brw, unsigned unit, uint32_t surf_index) { - const struct gen_device_info *devinfo = &brw->screen->devinfo; struct gl_context *ctx = &brw->ctx; struct intel_renderbuffer *irb = intel_renderbuffer(rb); struct intel_mipmap_tree *mt = irb->mt; @@ -245,7 +246,6 @@ gen6_update_renderbuffer_surface(struct brw_context *brw, uint32_t offset; brw_emit_surface_state(brw, mt, mt->target, view, aux_usage, - pte_mocs[devinfo->gen], &offset, surf_index, RELOC_WRITE); return offset; @@ -592,7 +592,6 @@ brw_update_texture_surface(struct gl_context *ctx, aux_usage = ISL_AUX_USAGE_NONE; brw_emit_surface_state(brw, mt, mt->target, view, aux_usage, - get_tex_mocs(devinfo, mt->bo), surf_offset, surf_index, 0); } @@ -623,7 +622,7 @@ brw_emit_buffer_surface_state(struct brw_context *brw, .size = buffer_size, .format = surface_format, .stride = pitch, - .mocs = get_tex_mocs(devinfo, bo)); + .mocs = brw_get_bo_mocs(devinfo, bo)); } void @@ -1057,7 +1056,6 @@ const struct brw_tracked_state gen6_renderbuffer_surfaces = { static void update_renderbuffer_read_surfaces(struct brw_context *brw) { - const struct gen_device_info *devinfo = &brw->screen->devinfo; const struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FS_PROG_DATA */ @@ -1113,7 +1111,6 @@ update_renderbuffer_read_surfaces(struct brw_context *brw) aux_usage = ISL_AUX_USAGE_NONE; brw_emit_surface_state(brw, irb->mt, target, view, aux_usage, - get_tex_mocs(devinfo, irb->mt->bo), surf_offset, surf_index, 0); @@ -1557,8 +1554,6 @@ update_image_surface(struct brw_context *brw, uint32_t *surf_offset, struct brw_image_param *param) { - const struct gen_device_info *devinfo = &brw->screen->devinfo; - if (_mesa_is_image_unit_valid(&brw->ctx, u)) { struct gl_texture_object *obj = u->TexObj; const unsigned format = get_image_format(brw, u->_ActualFormat, access); @@ -1606,7 +1601,6 @@ update_image_surface(struct brw_context *brw, view.array_len)); brw_emit_surface_state(brw, mt, mt->target, view, ISL_AUX_USAGE_NONE, - get_tex_mocs(devinfo, mt->bo), surf_offset, surf_index, access == GL_READ_ONLY ? 0 : RELOC_WRITE); } -- 2.30.2