From 4b8a942aabb60917b39b8d23b070af9099eb103a Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 2 Oct 2022 03:29:39 +0100 Subject: [PATCH] comments for why preinc is called for svstep --- src/openpower/decoder/isa/caller.py | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py index 6919cd74..ba681df3 100644 --- a/src/openpower/decoder/isa/caller.py +++ b/src/openpower/decoder/isa/caller.py @@ -1691,6 +1691,11 @@ class ISACaller(ISACallerHelper, ISAFPHelpers, StepLoop): log("sv rm", sv_rm, dest_cr, src_cr, src_byname, dest_byname) # see if srcstep/dststep need skipping over masked-out predicate bits + # svstep also needs advancement because it calls SVSTATE_NEXT. + # bit the remaps get computed just after pre_inc moves them on + # with remap_set_steps substituting for PowerDecider2 not doing it, + # and SVSTATE_NEXT not being able to.use yield, the preinc on + # svstep is necessary for now. self.reset_remaps() if (self.is_svp64_mode or ins_name in ['svstep']): yield from self.svstate_pre_inc() -- 2.30.2