From 4bcb39699b3b454823a9677b043f977a1bed03ee Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sat, 1 Dec 2012 13:04:22 +0100 Subject: [PATCH] bus/wishbone/sram: accept memories < 32 bits --- migen/bus/wishbone.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/migen/bus/wishbone.py b/migen/bus/wishbone.py index d0c0c5b5..b1d23233 100644 --- a/migen/bus/wishbone.py +++ b/migen/bus/wishbone.py @@ -197,7 +197,7 @@ class Target(PureSimulable): class SRAM: def __init__(self, mem_or_size, bus=Interface()): if isinstance(mem_or_size, Memory): - assert(mem_or_size.width == 32) + assert(mem_or_size.width <= 32) self.mem = mem_or_size else: self.mem = Memory(32, mem_or_size//4) -- 2.30.2