From 4c216d8f118742a0fe9a765e59111084c0c10807 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Fri, 23 Nov 2012 13:09:55 +0100 Subject: [PATCH] pytholite/io: support Wishbone reads --- migen/pytholite/io.py | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/migen/pytholite/io.py b/migen/pytholite/io.py index 04fb171e..f81dbca1 100644 --- a/migen/pytholite/io.py +++ b/migen/pytholite/io.py @@ -72,6 +72,20 @@ def _gen_df_io(compiler, modelname, to_model, from_model): ] return [state], [state] +class _BusReadExprCompiler(ExprCompiler): + def __init__(self, symdict, modelname, data_signal): + super().__init__(symdict) + self.modelname = modelname + self.data_signal = data_signal + + def visit_expr_attribute(self, node): + # recognize .data as the bus read signal, raise exception otherwise + if not isinstance(node.value, ast.Name) \ + or node.value.id != self.modelname \ + or node.attr != "data": + raise NotImplementedError + return self.data_signal + def _gen_wishbone_io(compiler, modelname, model, to_model, from_model, bus): state = [ bus.cyc.eq(1), @@ -85,7 +99,10 @@ def _gen_wishbone_io(compiler, modelname, model, to_model, from_model, bus): raise TypeError("Attempted to read from write transaction") else: state.append(bus.we.eq(0)) - # TODO + ec = _BusReadExprCompiler(compiler.symdict, modelname, bus.dat_r) + for target_regs, expr in from_model: + cexpr = ec.visit_expr(expr) + state += [reg.load(cexpr) for reg in target_regs] state.append(If(~bus.ack, AbstractNextState(state))) return [state], [state] -- 2.30.2