From 4c22199569f701692b3fe1116f2ff5b03c303931 Mon Sep 17 00:00:00 2001 From: Kaz Kojima Date: Tue, 29 Sep 2015 05:36:01 +0000 Subject: [PATCH] re PR target/67716 ([5] [SH]: Miscompiles libraw: Assembler: unaligned opcodes detected in executable segment) PR target/67716 * [SH] Implement targetm.override_options_after_change hook so to avoid resetting loop, jump and function alignment values with function-wise optimization flags. From-SVN: r228228 --- gcc/ChangeLog | 8 +++++ gcc/config/sh/sh.c | 85 ++++++++++++++++++++++++++-------------------- 2 files changed, 57 insertions(+), 36 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7fa651799b0..dc4a1872f11 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2015-09-29 Kaz Kojima + + PR target/67716 + * config/sh/sh.c (sh_override_options_after_change): New. + (TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE): Define. + (sh_option_override): Move align_loops, align_jumps and + align_functions handling into sh_override_options_after_change. + 2015-09-28 Nathan Sidwell * config/nvptx/nvptx.c: Include omp-low.h and gomp-constants.h. diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index b203258102a..16fb57595d2 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -202,6 +202,7 @@ static bool noncall_uses_reg (rtx, rtx_insn *, rtx *); static rtx_insn *gen_block_redirect (rtx_insn *, int, int); static void sh_reorg (void); static void sh_option_override (void); +static void sh_override_options_after_change (void); static void output_stack_adjust (int, rtx, int, HARD_REG_SET *, bool); static rtx_insn *frame_insn (rtx); static rtx push (int); @@ -392,6 +393,10 @@ static const struct attribute_spec sh_attribute_table[] = #undef TARGET_OPTION_OVERRIDE #define TARGET_OPTION_OVERRIDE sh_option_override +#undef TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE +#define TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE \ + sh_override_options_after_change + #undef TARGET_PRINT_OPERAND #define TARGET_PRINT_OPERAND sh_print_operand #undef TARGET_PRINT_OPERAND_ADDRESS @@ -1044,6 +1049,50 @@ sh_option_override (void) TARGET_ACCUMULATE_OUTGOING_ARGS = 1; } + if (flag_unsafe_math_optimizations) + { + /* Enable fsca insn for SH4A if not otherwise specified by the user. */ + if (global_options_set.x_TARGET_FSCA == 0 && TARGET_SH4A_FP) + TARGET_FSCA = 1; + + /* Enable fsrra insn for SH4A if not otherwise specified by the user. */ + if (global_options_set.x_TARGET_FSRRA == 0 && TARGET_SH4A_FP) + TARGET_FSRRA = 1; + } + + /* Allow fsrra insn only if -funsafe-math-optimizations and + -ffinite-math-only is enabled. */ + TARGET_FSRRA = TARGET_FSRRA + && flag_unsafe_math_optimizations + && flag_finite_math_only; + + /* If the -mieee option was not explicitly set by the user, turn it on + unless -ffinite-math-only was specified. See also PR 33135. */ + if (! global_options_set.x_TARGET_IEEE) + TARGET_IEEE = ! flag_finite_math_only; + + if (sh_fixed_range_str) + sh_fix_range (sh_fixed_range_str); + + /* This target defaults to strict volatile bitfields. */ + if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) + flag_strict_volatile_bitfields = 1; + + sh_override_options_after_change (); + + /* Parse atomic model option and make sure it is valid for the current + target CPU. */ + selected_atomic_model_ + = parse_validate_atomic_model_option (sh_atomic_model_str); + + register_sh_passes (); +} + +/* Implement targetm.override_options_after_change. */ + +static void +sh_override_options_after_change (void) +{ /* Adjust loop, jump and function alignment values (in bytes), if those were not specified by the user using -falign-loops, -falign-jumps and -falign-functions options. @@ -1093,42 +1142,6 @@ sh_option_override (void) if (align_functions < min_align) align_functions = min_align; } - - if (flag_unsafe_math_optimizations) - { - /* Enable fsca insn for SH4A if not otherwise specified by the user. */ - if (global_options_set.x_TARGET_FSCA == 0 && TARGET_SH4A_FP) - TARGET_FSCA = 1; - - /* Enable fsrra insn for SH4A if not otherwise specified by the user. */ - if (global_options_set.x_TARGET_FSRRA == 0 && TARGET_SH4A_FP) - TARGET_FSRRA = 1; - } - - /* Allow fsrra insn only if -funsafe-math-optimizations and - -ffinite-math-only is enabled. */ - TARGET_FSRRA = TARGET_FSRRA - && flag_unsafe_math_optimizations - && flag_finite_math_only; - - /* If the -mieee option was not explicitly set by the user, turn it on - unless -ffinite-math-only was specified. See also PR 33135. */ - if (! global_options_set.x_TARGET_IEEE) - TARGET_IEEE = ! flag_finite_math_only; - - if (sh_fixed_range_str) - sh_fix_range (sh_fixed_range_str); - - /* This target defaults to strict volatile bitfields. */ - if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) - flag_strict_volatile_bitfields = 1; - - /* Parse atomic model option and make sure it is valid for the current - target CPU. */ - selected_atomic_model_ - = parse_validate_atomic_model_option (sh_atomic_model_str); - - register_sh_passes (); } /* Print the operand address in x to the stream. */ -- 2.30.2