From 4c84600afafe9eaebb8e355122ffc421ae372136 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sat, 8 Aug 2020 16:40:54 -0400 Subject: [PATCH] radeonsi: fix compute-based culling with VERTEX_COUNTER_GDS_MODE == 1 Discovered when testing Sienna Cichlid. Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_compute_prim_discard.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_compute_prim_discard.c b/src/gallium/drivers/radeonsi/si_compute_prim_discard.c index 2313f74a023..757fc8b031b 100644 --- a/src/gallium/drivers/radeonsi/si_compute_prim_discard.c +++ b/src/gallium/drivers/radeonsi/si_compute_prim_discard.c @@ -1028,7 +1028,7 @@ si_prepare_prim_discard_or_split_draw(struct si_context *sctx, const struct pipe unsigned num_subdraws = DIV_ROUND_UP(num_prims, SPLIT_PRIMS_PACKET_LEVEL); unsigned need_compute_dw = 11 /* shader */ + 34 /* first draw */ + 24 * (num_subdraws - 1) + /* subdraws */ - 20; /* leave some space at the end */ + 30; /* leave some space at the end */ unsigned need_gfx_dw = si_get_minimum_num_gfx_cs_dwords(sctx); if (sctx->chip_class <= GFX7 || FORCE_REWIND_EMULATION) -- 2.30.2