From 4cb45dbf756f84c8e51b55a856738d9e544d7b29 Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 30 May 2022 10:15:34 +0100 Subject: [PATCH] --- openpower/sv/bitmanip.mdwn | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn index 15a673bc8..ca4d0acd3 100644 --- a/openpower/sv/bitmanip.mdwn +++ b/openpower/sv/bitmanip.mdwn @@ -108,9 +108,12 @@ TODO: convert all instructions to use RT and not RS | NN |FRS | d1 | d0 | d0 | 01 011 |d2| fishmv | DX-Form | | NN | | | | | 10 011 |Rc| svstep | SVL-Form | | NN | | | | | 11 011 |Rc| setvl | SVL-Form | -| NN | | | | | ---- 110 | | 1/2 ops | other table | +| NN | | | | | ---- 110 | | 1/2 ops | other table [1] | +| NN | RT | RA | RB | RC | 11 110 |Rc| bmrev | VA2-Form | | NN | RT | RA | RB | sh0-4 | sh5 1 111 |Rc| bmrevi | MDS-Form | +[1] except bmrev + ops (note that av avg and abs as well as vec scalar mask are included here [[sv/vector_ops]], and the [[sv/av_opcodes]]) @@ -158,7 +161,7 @@ the [[sv/av_opcodes]]) | NN | RT | RA | RB | 1 | 10 | 1110 110 |Rc| xpermw | X-Form | | NN | RT | RA | RB | 0 | 11 | 1110 110 |Rc| abssa | X-Form | | NN | RT | RA | RB | 1 | 11 | 1110 110 |Rc| absua | X-Form | -| NN | | | | | | --11 110 |Rc| rsvd | | +| NN | | | | | | --11 110 |Rc| bmrev | VA2-Form | # binary and ternary bitops -- 2.30.2