From 4cfb05f84d6467650e60449f6432c1459d978823 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 6 Jun 2021 14:01:16 +0000 Subject: [PATCH] argh, nsxlib cannot cope with 3 clocks! --- experiments9/doDesign.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/experiments9/doDesign.py b/experiments9/doDesign.py index 062c88d..9496838 100644 --- a/experiments9/doDesign.py +++ b/experiments9/doDesign.py @@ -58,8 +58,8 @@ def scriptMain (**kw): ls180Conf.chipConf.ioPadGauge = 'niolib' ls180Conf.coreSize = (l(coreSize ), l(coreSize )) ls180Conf.chipSize = (l(coreSize+3360), l(coreSize+3360)) + # ooo, how annoying. nsxlib (only 6 METAL) cannot cope with 3 clocks! #ls180Conf.useHTree('core.por_clk') # output from the PLL, needs to be H-Tree - #ls180Conf.useHTree('test_issuer.pllclk_clk') # output from the PLL, needs to be H-Tree ls180Conf.useHTree('jtag_tck_from_pad') ls180Conf.useHTree('sys_clk_from_pad') -- 2.30.2