From 4d1bc60a12eafe8aed38fff234a4f6ca16f78501 Mon Sep 17 00:00:00 2001 From: Paul Koning Date: Fri, 22 Oct 2010 15:53:48 -0400 Subject: [PATCH] * config/pdp11/pdp11.h (IRA_COVER_CLASSES): Define. From-SVN: r165858 --- gcc/ChangeLog | 4 ++++ gcc/config/pdp11/pdp11.h | 10 ++++++++++ 2 files changed, 14 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 54939bccc83..d4114d31e9a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2010-10-22 Paul Koning + + * config/pdp11/pdp11.h (IRA_COVER_CLASSES): Define. + 2010-10-22 Richard Henderson * config/i386/i386.c (ix86_builtin_vectorized_function): Add diff --git a/gcc/config/pdp11/pdp11.h b/gcc/config/pdp11/pdp11.h index 7a26eb06174..81180ebf6f6 100644 --- a/gcc/config/pdp11/pdp11.h +++ b/gcc/config/pdp11/pdp11.h @@ -320,6 +320,16 @@ enum reg_class { NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REG #define INDEX_REG_CLASS GENERAL_REGS #define BASE_REG_CLASS GENERAL_REGS +/* The following macro defines cover classes for Integrated Register + Allocator. Cover classes is a set of non-intersected register + classes covering all hard registers used for register allocation + purpose. Any move between two registers of a cover class should be + cheaper than load or store of the registers. The macro value is + array of register classes with LIM_REG_CLASSES used as the end + marker. */ + +#define IRA_COVER_CLASSES { GENERAL_REGS, FPU_REGS, LIM_REG_CLASSES } + /* Given an rtx X being reloaded into a reg required to be in class CLASS, return the class of reg to actually use. In general this is just CLASS; but on some machines -- 2.30.2