From 4e4c32ba11598818583ad0aa689339297ddf1c74 Mon Sep 17 00:00:00 2001
From: Vincent Lejeune <vljn@ovi.com>
Date: Wed, 25 Sep 2013 16:06:11 +0200
Subject: [PATCH] r600/llvm: Adds support for MSAA

---
 src/gallium/drivers/r600/r600_llvm.c     | 52 +++++++++++++++++++++++-
 src/gallium/drivers/r600/r600_shader.c   |  2 +
 src/gallium/drivers/radeon/radeon_llvm.h |  1 +
 3 files changed, 54 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c
index b1b88b8d94a..34dd3addbb0 100644
--- a/src/gallium/drivers/r600/r600_llvm.c
+++ b/src/gallium/drivers/r600/r600_llvm.c
@@ -406,8 +406,9 @@ static void llvm_emit_tex(
 	struct lp_build_emit_data * emit_data)
 {
 	struct gallivm_state * gallivm = bld_base->base.gallivm;
-	LLVMValueRef args[6];
+	LLVMValueRef args[7];
 	unsigned c, sampler_src;
+	struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base);
 
 	if (emit_data->inst->Texture.Texture == TGSI_TEXTURE_BUFFER) {
 		switch (emit_data->inst->Instruction.Opcode) {
@@ -481,6 +482,55 @@ static void llvm_emit_tex(
 	args[c++] = lp_build_const_int32(gallivm,
 					emit_data->inst->Texture.Texture);
 
+	if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_TXF &&
+		(emit_data->inst->Texture.Texture == TGSI_TEXTURE_2D_MSAA ||
+		emit_data->inst->Texture.Texture == TGSI_TEXTURE_2D_ARRAY_MSAA)) {
+
+		switch (emit_data->inst->Texture.Texture) {
+		case TGSI_TEXTURE_2D_MSAA:
+			args[6] = lp_build_const_int32(gallivm, TGSI_TEXTURE_2D);
+			break;
+		case TGSI_TEXTURE_2D_ARRAY_MSAA:
+			args[6] = lp_build_const_int32(gallivm, TGSI_TEXTURE_2D_ARRAY);
+			break;
+		default:
+			break;
+		}
+
+		if (ctx->has_compressed_msaa_texturing) {
+			LLVMValueRef ldptr_args[10] = {
+				args[0], // Coord
+				args[1], // Offset X
+				args[2], // Offset Y
+				args[3], // Offset Z
+				args[4],
+				args[5],
+				lp_build_const_int32(gallivm, 1),
+				lp_build_const_int32(gallivm, 1),
+				lp_build_const_int32(gallivm, 1),
+				lp_build_const_int32(gallivm, 1)
+			};
+			LLVMValueRef ptr = build_intrinsic(gallivm->builder,
+				"llvm.R600.ldptr",
+				emit_data->dst_type, ldptr_args, 10, LLVMReadNoneAttribute);
+			LLVMValueRef Tmp = LLVMBuildExtractElement(gallivm->builder, args[0],
+				lp_build_const_int32(gallivm, 3), "");
+			Tmp = LLVMBuildMul(gallivm->builder, Tmp,
+				lp_build_const_int32(gallivm, 4), "");
+			LLVMValueRef ResX = LLVMBuildExtractElement(gallivm->builder, ptr,
+				lp_build_const_int32(gallivm, 0), "");
+			ResX = LLVMBuildBitCast(gallivm->builder, ResX,
+				bld_base->base.int_elem_type, "");
+			Tmp = LLVMBuildLShr(gallivm->builder, ResX, Tmp, "");
+			Tmp = LLVMBuildAnd(gallivm->builder, Tmp,
+				lp_build_const_int32(gallivm, 0xF), "");
+			args[0] = LLVMBuildInsertElement(gallivm->builder, args[0], Tmp,
+				lp_build_const_int32(gallivm, 3), "");
+			args[c++] = lp_build_const_int32(gallivm,
+				emit_data->inst->Texture.Texture);
+		}
+	}
+
 	emit_data->output[0] = build_intrinsic(gallivm->builder,
 					action->intr_name,
 					emit_data->dst_type, args, c, LLVMReadNoneAttribute);
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 6ad7b2b079e..206db04f2b6 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -1110,6 +1110,8 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen,
 		radeon_llvm_ctx.stream_outputs = &so;
 		radeon_llvm_ctx.clip_vertex = ctx.cv_output;
 		radeon_llvm_ctx.alpha_to_one = key.alpha_to_one;
+		radeon_llvm_ctx.has_compressed_msaa_texturing =
+			ctx.bc->has_compressed_msaa_texturing;
 		mod = r600_tgsi_llvm(&radeon_llvm_ctx, tokens);
 		ctx.shader->has_txq_cube_array_z_comp = radeon_llvm_ctx.has_txq_cube_array_z_comp;
 		ctx.shader->uses_tex_buffers = radeon_llvm_ctx.uses_tex_buffers;
diff --git a/src/gallium/drivers/radeon/radeon_llvm.h b/src/gallium/drivers/radeon/radeon_llvm.h
index 345ae706cf0..ef09dc891dc 100644
--- a/src/gallium/drivers/radeon/radeon_llvm.h
+++ b/src/gallium/drivers/radeon/radeon_llvm.h
@@ -68,6 +68,7 @@ struct radeon_llvm_context {
 	unsigned alpha_to_one;
 	unsigned has_txq_cube_array_z_comp;
 	unsigned uses_tex_buffers;
+	unsigned has_compressed_msaa_texturing;
 
 	/*=== Front end configuration ===*/
 
-- 
2.30.2