From 4e56a2aaa86891873866966f9c4bd016ce907f77 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Wed, 3 Jul 2019 22:27:12 -0400 Subject: [PATCH] radeonsi: simplify primitive binning enablement Acked-by: Pierre-Eric Pelloux-Prayer Acked-by: Dave Airlie --- src/gallium/drivers/radeonsi/si_pipe.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 07b483a7668..669013ec3fd 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -1127,11 +1127,11 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws, sscreen->info.chip_class >= GFX10; /* Only enable primitive binning on APUs by default. */ - sscreen->dpbb_allowed = sscreen->info.family == CHIP_RAVEN || - sscreen->info.family == CHIP_RAVEN2; + sscreen->dpbb_allowed = sscreen->info.chip_class >= GFX9 && + !sscreen->info.has_dedicated_vram; - sscreen->dfsm_allowed = sscreen->info.family == CHIP_RAVEN || - sscreen->info.family == CHIP_RAVEN2; + sscreen->dfsm_allowed = sscreen->info.chip_class >= GFX9 && + !sscreen->info.has_dedicated_vram; /* Process DPBB enable flags. */ if (sscreen->debug_flags & DBG(DPBB)) { -- 2.30.2