From 4e56a9ad46ff7fe85308ce12e21719ff2b476516 Mon Sep 17 00:00:00 2001 From: Jordan Justen Date: Thu, 19 Mar 2015 18:57:34 -0700 Subject: [PATCH] i965/state: Don't use brw->state.dirty.brw MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Now, we only use ctx->NewDriverState. I used this bash & sed command in the i965 directory: for file in *.[ch] *.[ch]pp; do sed -i -e 's/state\.dirty\.brw/ctx.NewDriverState/g' $file done Followed by manual changes to brw_state_upload.c. Signed-off-by: Jordan Justen Reviewed-by: Kristian Høgsberg Reviewed-by: Kenneth Graunke --- .../drivers/dri/i965/brw_binding_tables.c | 2 +- src/mesa/drivers/dri/i965/brw_blorp.cpp | 2 +- src/mesa/drivers/dri/i965/brw_cc.c | 4 +-- src/mesa/drivers/dri/i965/brw_clip_state.c | 2 +- src/mesa/drivers/dri/i965/brw_curbe.c | 4 +-- src/mesa/drivers/dri/i965/brw_draw.c | 22 +++++++-------- src/mesa/drivers/dri/i965/brw_draw_upload.c | 4 +-- src/mesa/drivers/dri/i965/brw_ff_gs.c | 2 +- src/mesa/drivers/dri/i965/brw_gs.c | 8 +++--- src/mesa/drivers/dri/i965/brw_gs_state.c | 2 +- .../drivers/dri/i965/brw_interpolation_map.c | 2 +- .../drivers/dri/i965/brw_meta_fast_clear.c | 4 +-- src/mesa/drivers/dri/i965/brw_misc_state.c | 4 +-- src/mesa/drivers/dri/i965/brw_program.c | 4 +-- src/mesa/drivers/dri/i965/brw_queryobj.c | 4 +-- src/mesa/drivers/dri/i965/brw_sampler_state.c | 2 +- src/mesa/drivers/dri/i965/brw_sf_state.c | 4 +-- src/mesa/drivers/dri/i965/brw_state.h | 2 +- src/mesa/drivers/dri/i965/brw_state_cache.c | 8 +++--- src/mesa/drivers/dri/i965/brw_state_upload.c | 27 +++++++++---------- src/mesa/drivers/dri/i965/brw_urb.c | 2 +- src/mesa/drivers/dri/i965/brw_vs.c | 4 +-- src/mesa/drivers/dri/i965/brw_vs_state.c | 2 +- .../drivers/dri/i965/brw_vs_surface_state.c | 4 +-- src/mesa/drivers/dri/i965/brw_wm_state.c | 2 +- .../drivers/dri/i965/brw_wm_surface_state.c | 8 +++--- src/mesa/drivers/dri/i965/gen6_sol.c | 8 +++--- .../drivers/dri/i965/gen6_viewport_state.c | 4 +-- src/mesa/drivers/dri/i965/gen7_urb.c | 4 +-- src/mesa/drivers/dri/i965/gen7_vs_state.c | 2 +- src/mesa/drivers/dri/i965/gen8_misc_state.c | 2 +- src/mesa/drivers/dri/i965/intel_batchbuffer.c | 4 +-- .../drivers/dri/i965/intel_buffer_objects.c | 6 ++--- 33 files changed, 82 insertions(+), 83 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c b/src/mesa/drivers/dri/i965/brw_binding_tables.c index 08e41914428..459165a5aeb 100644 --- a/src/mesa/drivers/dri/i965/brw_binding_tables.c +++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c @@ -84,7 +84,7 @@ brw_upload_binding_table(struct brw_context *brw, prog_data->binding_table.size_bytes); } - brw->state.dirty.brw |= brw_new_binding_table; + brw->ctx.NewDriverState |= brw_new_binding_table; if (brw->gen >= 7) { BEGIN_BATCH(2); diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index df00b772135..78ac58efc09 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -276,7 +276,7 @@ retry: /* We've smashed all state compared to what the normal 3D pipeline * rendering tracks for GL. */ - brw->state.dirty.brw = ~0ull; + brw->ctx.NewDriverState = ~0ull; brw->no_depth_or_stencil = false; brw->ib.type = -1; diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c index 02f5a3a76fb..354c73321cd 100644 --- a/src/mesa/drivers/dri/i965/brw_cc.c +++ b/src/mesa/drivers/dri/i965/brw_cc.c @@ -68,7 +68,7 @@ brw_upload_cc_vp(struct brw_context *brw) OUT_BATCH(brw->cc.vp_offset); ADVANCE_BATCH(); } else { - brw->state.dirty.brw |= BRW_NEW_CC_VP; + brw->ctx.NewDriverState |= BRW_NEW_CC_VP; } } @@ -230,7 +230,7 @@ static void upload_cc_unit(struct brw_context *brw) cc->cc4.cc_viewport_state_offset = (brw->batch.bo->offset64 + brw->cc.vp_offset) >> 5; /* reloc */ - brw->state.dirty.brw |= BRW_NEW_GEN4_UNIT_STATE; + brw->ctx.NewDriverState |= BRW_NEW_GEN4_UNIT_STATE; /* Emit CC viewport relocation */ drm_intel_bo_emit_reloc(brw->batch.bo, diff --git a/src/mesa/drivers/dri/i965/brw_clip_state.c b/src/mesa/drivers/dri/i965/brw_clip_state.c index 09a2523d8a0..4f241ac29b7 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_state.c +++ b/src/mesa/drivers/dri/i965/brw_clip_state.c @@ -158,7 +158,7 @@ brw_upload_clip_unit(struct brw_context *brw) clip->viewport_ymin = -1; clip->viewport_ymax = 1; - brw->state.dirty.brw |= BRW_NEW_GEN4_UNIT_STATE; + brw->ctx.NewDriverState |= BRW_NEW_GEN4_UNIT_STATE; } const struct brw_tracked_state brw_clip_unit = { diff --git a/src/mesa/drivers/dri/i965/brw_curbe.c b/src/mesa/drivers/dri/i965/brw_curbe.c index d0ec8595c45..e45e2abd3fc 100644 --- a/src/mesa/drivers/dri/i965/brw_curbe.c +++ b/src/mesa/drivers/dri/i965/brw_curbe.c @@ -134,7 +134,7 @@ static void calculate_curbe_offsets( struct brw_context *brw ) brw->curbe.vs_start, brw->curbe.vs_size ); - brw->state.dirty.brw |= BRW_NEW_CURBE_OFFSETS; + brw->ctx.NewDriverState |= BRW_NEW_CURBE_OFFSETS; } } @@ -292,7 +292,7 @@ emit: * We've found no documented reason why this should be necessary. */ if (brw->gen == 4 && !brw->is_g4x && - (brw->state.dirty.brw & (BRW_NEW_BATCH | BRW_NEW_PSP)) == 0) { + (brw->ctx.NewDriverState & (BRW_NEW_BATCH | BRW_NEW_PSP)) == 0) { BEGIN_BATCH(1); OUT_BATCH(MI_FLUSH); ADVANCE_BATCH(); diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index c573b506492..96e23697923 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -127,11 +127,11 @@ static void brw_set_prim(struct brw_context *brw, if (hw_prim != brw->primitive) { brw->primitive = hw_prim; - brw->state.dirty.brw |= BRW_NEW_PRIMITIVE; + brw->ctx.NewDriverState |= BRW_NEW_PRIMITIVE; if (reduced_prim[prim->mode] != brw->reduced_primitive) { brw->reduced_primitive = reduced_prim[prim->mode]; - brw->state.dirty.brw |= BRW_NEW_REDUCED_PRIMITIVE; + brw->ctx.NewDriverState |= BRW_NEW_REDUCED_PRIMITIVE; } } } @@ -147,7 +147,7 @@ static void gen6_set_prim(struct brw_context *brw, if (hw_prim != brw->primitive) { brw->primitive = hw_prim; - brw->state.dirty.brw |= BRW_NEW_PRIMITIVE; + brw->ctx.NewDriverState |= BRW_NEW_PRIMITIVE; } } @@ -334,7 +334,7 @@ static void brw_merge_inputs( struct brw_context *brw, if (brw->vb.attrib_wa_flags[i] != wa_flags) { brw->vb.attrib_wa_flags[i] = wa_flags; - brw->state.dirty.brw |= BRW_NEW_VS_ATTRIB_WORKAROUNDS; + brw->ctx.NewDriverState |= BRW_NEW_VS_ATTRIB_WORKAROUNDS; } } } @@ -441,11 +441,11 @@ static void brw_try_draw_prims( struct gl_context *ctx, brw_merge_inputs( brw, arrays ); brw->ib.ib = ib; - brw->state.dirty.brw |= BRW_NEW_INDICES; + brw->ctx.NewDriverState |= BRW_NEW_INDICES; brw->vb.min_index = min_index; brw->vb.max_index = max_index; - brw->state.dirty.brw |= BRW_NEW_VERTICES; + brw->ctx.NewDriverState |= BRW_NEW_VERTICES; for (i = 0; i < nr_prims; i++) { int estimated_max_prim_size; @@ -470,7 +470,7 @@ static void brw_try_draw_prims( struct gl_context *ctx, brw->num_instances = prims[i].num_instances; brw->basevertex = prims[i].basevertex; if (i > 0) { /* For i == 0 we just did this before the loop */ - brw->state.dirty.brw |= BRW_NEW_VERTICES; + brw->ctx.NewDriverState |= BRW_NEW_VERTICES; brw_merge_inputs(brw, arrays); } } @@ -502,12 +502,12 @@ static void brw_try_draw_prims( struct gl_context *ctx, retry: - /* Note that before the loop, brw->state.dirty.brw was set to != 0, and + /* Note that before the loop, brw->ctx.NewDriverState was set to != 0, and * that the state updated in the loop outside of this block is that in * *_set_prim or intel_batchbuffer_flush(), which only impacts - * brw->state.dirty.brw. + * brw->ctx.NewDriverState. */ - if (brw->state.dirty.brw) { + if (brw->ctx.NewDriverState) { brw->no_batch_wrap = true; brw_upload_render_state(brw); } @@ -533,7 +533,7 @@ retry: /* Now that we know we haven't run out of aperture space, we can safely * reset the dirty bits. */ - if (brw->state.dirty.brw) + if (brw->ctx.NewDriverState) brw_render_state_finished(brw); } diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index 52dcb6f2c4c..b1af0d7b115 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -919,11 +919,11 @@ static void brw_upload_indices(struct brw_context *brw) brw->ib.start_vertex_offset = offset / ib_type_size; if (brw->ib.bo != old_bo) - brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER; + brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER; if (index_buffer->type != brw->ib.type) { brw->ib.type = index_buffer->type; - brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER; + brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER; } } diff --git a/src/mesa/drivers/dri/i965/brw_ff_gs.c b/src/mesa/drivers/dri/i965/brw_ff_gs.c index 828e383bbd4..016fcdf3db5 100644 --- a/src/mesa/drivers/dri/i965/brw_ff_gs.c +++ b/src/mesa/drivers/dri/i965/brw_ff_gs.c @@ -238,7 +238,7 @@ brw_upload_ff_gs_prog(struct brw_context *brw) populate_key(brw, &key); if (brw->ff_gs.prog_active != key.need_gs_prog) { - brw->state.dirty.brw |= BRW_NEW_FF_GS_PROG_DATA; + brw->ctx.NewDriverState |= BRW_NEW_FF_GS_PROG_DATA; brw->ff_gs.prog_active = key.need_gs_prog; } diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c index 45c157a468e..ffe74768253 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.c +++ b/src/mesa/drivers/dri/i965/brw_gs.c @@ -307,13 +307,13 @@ brw_upload_gs_prog(struct brw_context *brw) if (gp == NULL) { /* No geometry shader. Vertex data just passes straight through. */ - if (brw->state.dirty.brw & BRW_NEW_VUE_MAP_VS) { + if (brw->ctx.NewDriverState & BRW_NEW_VUE_MAP_VS) { brw->vue_map_geom_out = brw->vue_map_vs; - brw->state.dirty.brw |= BRW_NEW_VUE_MAP_GEOM_OUT; + brw->ctx.NewDriverState |= BRW_NEW_VUE_MAP_GEOM_OUT; } if (brw->gen == 6 && - (brw->state.dirty.brw & BRW_NEW_TRANSFORM_FEEDBACK)) { + (brw->ctx.NewDriverState & BRW_NEW_TRANSFORM_FEEDBACK)) { gen6_brw_upload_ff_gs_prog(brw); return; } @@ -356,7 +356,7 @@ brw_upload_gs_prog(struct brw_context *brw) if (memcmp(&brw->gs.prog_data->base.vue_map, &brw->vue_map_geom_out, sizeof(brw->vue_map_geom_out)) != 0) { brw->vue_map_geom_out = brw->gs.prog_data->base.vue_map; - brw->state.dirty.brw |= BRW_NEW_VUE_MAP_GEOM_OUT; + brw->ctx.NewDriverState |= BRW_NEW_VUE_MAP_GEOM_OUT; } } diff --git a/src/mesa/drivers/dri/i965/brw_gs_state.c b/src/mesa/drivers/dri/i965/brw_gs_state.c index cb46ace0261..f7b14066594 100644 --- a/src/mesa/drivers/dri/i965/brw_gs_state.c +++ b/src/mesa/drivers/dri/i965/brw_gs_state.c @@ -85,7 +85,7 @@ brw_upload_gs_unit(struct brw_context *brw) gs->gs6.max_vp_index = brw->ctx.Const.MaxViewports - 1; - brw->state.dirty.brw |= BRW_NEW_GEN4_UNIT_STATE; + brw->ctx.NewDriverState |= BRW_NEW_GEN4_UNIT_STATE; } const struct brw_tracked_state brw_gs_unit = { diff --git a/src/mesa/drivers/dri/i965/brw_interpolation_map.c b/src/mesa/drivers/dri/i965/brw_interpolation_map.c index 8ab17aaa505..b5da6f5ea3b 100644 --- a/src/mesa/drivers/dri/i965/brw_interpolation_map.c +++ b/src/mesa/drivers/dri/i965/brw_interpolation_map.c @@ -44,7 +44,7 @@ brw_setup_vue_interpolation(struct brw_context *brw) memset(&brw->interpolation_mode, INTERP_QUALIFIER_NONE, sizeof(brw->interpolation_mode)); - brw->state.dirty.brw |= BRW_NEW_INTERPOLATION_MAP; + brw->ctx.NewDriverState |= BRW_NEW_INTERPOLATION_MAP; if (!fprog) return; diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c index c8f2a140331..d45f1e6d517 100644 --- a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c +++ b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c @@ -376,7 +376,7 @@ set_fast_clear_op(struct brw_context *brw, uint32_t op) * 3DSTATE_PS. */ brw->wm.fast_clear_op = op; - brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM; + brw->ctx.NewDriverState |= BRW_NEW_FRAGMENT_PROGRAM; } static void @@ -401,7 +401,7 @@ use_rectlist(struct brw_context *brw, bool enable) * clear color value. */ brw->state.dirty.mesa |= _NEW_LIGHT | _NEW_BUFFERS; - brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM; + brw->ctx.NewDriverState |= BRW_NEW_FRAGMENT_PROGRAM; } bool diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index bc810769793..78a46cb050d 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -98,7 +98,7 @@ static void upload_pipelined_state_pointers(struct brw_context *brw ) brw->cc.state_offset); ADVANCE_BATCH(); - brw->state.dirty.brw |= BRW_NEW_PSP; + brw->ctx.NewDriverState |= BRW_NEW_PSP; } static void upload_psp_urb_cbs(struct brw_context *brw ) @@ -1014,7 +1014,7 @@ static void upload_state_base_address( struct brw_context *brw ) * obvious. */ - brw->state.dirty.brw |= BRW_NEW_STATE_BASE_ADDRESS; + brw->ctx.NewDriverState |= BRW_NEW_STATE_BASE_ADDRESS; } const struct brw_tracked_state brw_state_base_address = { diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index 70b5a6289e2..8920c34b029 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -136,7 +136,7 @@ brwProgramStringNotify(struct gl_context *ctx, brw_fragment_program_const(brw->fragment_program); if (newFP == curFP) - brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM; + brw->ctx.NewDriverState |= BRW_NEW_FRAGMENT_PROGRAM; newFP->id = get_new_program_id(brw->intelScreen); brw_add_texrect_params(prog); @@ -151,7 +151,7 @@ brwProgramStringNotify(struct gl_context *ctx, brw_vertex_program_const(brw->vertex_program); if (newVP == curVP) - brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM; + brw->ctx.NewDriverState |= BRW_NEW_VERTEX_PROGRAM; if (newVP->program.IsPositionInvariant) { _mesa_insert_mvp_code(ctx, &newVP->program); } diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c index 2a9082272d4..917a24f81d5 100644 --- a/src/mesa/drivers/dri/i965/brw_queryobj.c +++ b/src/mesa/drivers/dri/i965/brw_queryobj.c @@ -251,7 +251,7 @@ brw_begin_query(struct gl_context *ctx, struct gl_query_object *q) * so turn them on now. */ brw->stats_wm++; - brw->state.dirty.brw |= BRW_NEW_STATS_WM; + brw->ctx.NewDriverState |= BRW_NEW_STATS_WM; break; default: @@ -308,7 +308,7 @@ brw_end_query(struct gl_context *ctx, struct gl_query_object *q) brw->query.obj = NULL; brw->stats_wm--; - brw->state.dirty.brw |= BRW_NEW_STATS_WM; + brw->ctx.NewDriverState |= BRW_NEW_STATS_WM; break; default: diff --git a/src/mesa/drivers/dri/i965/brw_sampler_state.c b/src/mesa/drivers/dri/i965/brw_sampler_state.c index c5328507598..c4bd949fcdd 100644 --- a/src/mesa/drivers/dri/i965/brw_sampler_state.c +++ b/src/mesa/drivers/dri/i965/brw_sampler_state.c @@ -573,7 +573,7 @@ brw_upload_sampler_state_table(struct brw_context *brw, /* Flag that the sampler state table pointer has changed; later atoms * will handle it. */ - brw->state.dirty.brw |= BRW_NEW_SAMPLER_STATE_TABLE; + brw->ctx.NewDriverState |= BRW_NEW_SAMPLER_STATE_TABLE; } } diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c index 75d64514ea0..e0558378108 100644 --- a/src/mesa/drivers/dri/i965/brw_sf_state.c +++ b/src/mesa/drivers/dri/i965/brw_sf_state.c @@ -109,7 +109,7 @@ static void upload_sf_vp(struct brw_context *brw) sfv->scissor.ymax = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymin - 1; } - brw->state.dirty.brw |= BRW_NEW_SF_VP; + brw->ctx.NewDriverState |= BRW_NEW_SF_VP; } const struct brw_tracked_state brw_sf_vp = { @@ -291,7 +291,7 @@ static void upload_sf_unit( struct brw_context *brw ) (sf->sf5.viewport_transform << 1)), I915_GEM_DOMAIN_INSTRUCTION, 0); - brw->state.dirty.brw |= BRW_NEW_GEN4_UNIT_STATE; + brw->ctx.NewDriverState |= BRW_NEW_GEN4_UNIT_STATE; } const struct brw_tracked_state brw_sf_unit = { diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index e4281831225..bb920b22167 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -156,7 +156,7 @@ static inline bool brw_state_dirty(struct brw_context *brw, GLuint mesa_flags, uint64_t brw_flags) { return ((brw->state.dirty.mesa & mesa_flags) | - (brw->state.dirty.brw & brw_flags)) != 0; + (brw->ctx.NewDriverState & brw_flags)) != 0; } /* brw_misc_state.c */ diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c index 3b9d6cc4f98..bfe7e514964 100644 --- a/src/mesa/drivers/dri/i965/brw_state_cache.c +++ b/src/mesa/drivers/dri/i965/brw_state_cache.c @@ -157,7 +157,7 @@ brw_search_cache(struct brw_cache *cache, *(void **)out_aux = ((char *)item->key + item->key_size); if (item->offset != *inout_offset) { - brw->state.dirty.brw |= (1 << cache_id); + brw->ctx.NewDriverState |= (1 << cache_id); *inout_offset = item->offset; } @@ -195,7 +195,7 @@ brw_cache_new_bo(struct brw_cache *cache, uint32_t new_size) /* Since we have a new BO in place, we need to signal the units * that depend on it (state base address on gen5+, or unit state before). */ - brw->state.dirty.brw |= BRW_NEW_PROGRAM_CACHE; + brw->ctx.NewDriverState |= BRW_NEW_PROGRAM_CACHE; } /** @@ -339,7 +339,7 @@ brw_upload_cache(struct brw_cache *cache, *out_offset = item->offset; *(void **)out_aux = (void *)((char *)item->key + item->key_size); - cache->brw->state.dirty.brw |= 1 << cache_id; + cache->brw->ctx.NewDriverState |= 1 << cache_id; } void @@ -400,7 +400,7 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) * any offsets leftover in brw_context will no longer be valid. */ brw->state.dirty.mesa |= ~0; - brw->state.dirty.brw |= ~0ull; + brw->ctx.NewDriverState |= ~0ull; intel_batchbuffer_flush(brw); } diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 1e00566d5ca..255e8927f43 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -439,17 +439,17 @@ void brw_init_state( struct brw_context *brw ) brw_upload_initial_gpu_state(brw); brw->state.dirty.mesa = ~0; - brw->state.dirty.brw = ~0ull; + brw->ctx.NewDriverState = ~0ull; /* ~0 is a nonsensical value which won't match anything we program, so * the programming will take effect on the first time around. */ brw->pma_stall_bits = ~0; - /* Make sure that brw->state.dirty.brw has enough bits to hold all possible + /* Make sure that brw->ctx.NewDriverState has enough bits to hold all possible * dirty flags. */ - STATIC_ASSERT(BRW_NUM_STATE_BITS <= 8 * sizeof(brw->state.dirty.brw)); + STATIC_ASSERT(BRW_NUM_STATE_BITS <= 8 * sizeof(brw->ctx.NewDriverState)); ctx->DriverFlags.NewTransformFeedback = BRW_NEW_TRANSFORM_FEEDBACK; ctx->DriverFlags.NewTransformFeedbackProg = BRW_NEW_TRANSFORM_FEEDBACK; @@ -624,7 +624,8 @@ merge_ctx_state(struct brw_context *brw, struct brw_state_flags *state) { state->mesa |= brw->state.dirty.mesa; - state->brw |= brw->state.dirty.brw; + state->brw |= brw->ctx.NewDriverState; + assert(brw->state.dirty.brw == 0ull); } static inline void @@ -651,40 +652,37 @@ brw_upload_pipeline_state(struct brw_context *brw, brw_state->mesa |= brw->NewGLState; brw->NewGLState = 0; - brw_state->brw |= ctx->NewDriverState; - ctx->NewDriverState = 0; - if (0) { /* Always re-emit all state. */ brw_state->mesa |= ~0; - brw_state->brw |= ~0ull; + ctx->NewDriverState = ~0ull; } if (pipeline == BRW_RENDER_PIPELINE) { if (brw->fragment_program != ctx->FragmentProgram._Current) { brw->fragment_program = ctx->FragmentProgram._Current; - brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM; + brw->ctx.NewDriverState |= BRW_NEW_FRAGMENT_PROGRAM; } if (brw->geometry_program != ctx->GeometryProgram._Current) { brw->geometry_program = ctx->GeometryProgram._Current; - brw->state.dirty.brw |= BRW_NEW_GEOMETRY_PROGRAM; + brw->ctx.NewDriverState |= BRW_NEW_GEOMETRY_PROGRAM; } if (brw->vertex_program != ctx->VertexProgram._Current) { brw->vertex_program = ctx->VertexProgram._Current; - brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM; + brw->ctx.NewDriverState |= BRW_NEW_VERTEX_PROGRAM; } } if (brw->meta_in_progress != _mesa_meta_in_progress(ctx)) { brw->meta_in_progress = _mesa_meta_in_progress(ctx); - brw->state.dirty.brw |= BRW_NEW_META_IN_PROGRESS; + brw->ctx.NewDriverState |= BRW_NEW_META_IN_PROGRESS; } if (brw->num_samples != ctx->DrawBuffer->Visual.samples) { brw->num_samples = ctx->DrawBuffer->Visual.samples; - brw->state.dirty.brw |= BRW_NEW_NUM_SAMPLES; + brw->ctx.NewDriverState |= BRW_NEW_NUM_SAMPLES; } /* Exit early if no state is flagged as dirty */ @@ -768,12 +766,13 @@ brw_pipeline_state_finished(struct brw_context *brw, for (int i = 0; i < BRW_NUM_PIPELINES; i++) { if (i != pipeline) { brw->state.pipelines[i].mesa |= state->mesa; - brw->state.pipelines[i].brw |= state->brw; + brw->state.pipelines[i].brw |= brw->ctx.NewDriverState; } else { memset(&brw->state.pipelines[i], 0, sizeof(struct brw_state_flags)); } } + brw->ctx.NewDriverState = 0ull; memset(state, 0, sizeof(*state)); } diff --git a/src/mesa/drivers/dri/i965/brw_urb.c b/src/mesa/drivers/dri/i965/brw_urb.c index e76db6af976..6fcf1b0cb1d 100644 --- a/src/mesa/drivers/dri/i965/brw_urb.c +++ b/src/mesa/drivers/dri/i965/brw_urb.c @@ -204,7 +204,7 @@ done: brw->urb.cs_start, brw->urb.size); - brw->state.dirty.brw |= BRW_NEW_URB_FENCE; + brw->ctx.NewDriverState |= BRW_NEW_URB_FENCE; } } diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index ba2c23d4405..bf16f348ec4 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -474,13 +474,13 @@ brw_upload_vs_prog(struct brw_context *brw) if (memcmp(&brw->vs.prog_data->base.vue_map, &brw->vue_map_geom_out, sizeof(brw->vue_map_geom_out)) != 0) { brw->vue_map_vs = brw->vs.prog_data->base.vue_map; - brw->state.dirty.brw |= BRW_NEW_VUE_MAP_VS; + brw->ctx.NewDriverState |= BRW_NEW_VUE_MAP_VS; if (brw->gen < 6) { /* No geometry shader support, so the VS VUE map is the VUE map for * the output of the "geometry" portion of the pipeline. */ brw->vue_map_geom_out = brw->vue_map_vs; - brw->state.dirty.brw |= BRW_NEW_VUE_MAP_GEOM_OUT; + brw->ctx.NewDriverState |= BRW_NEW_VUE_MAP_GEOM_OUT; } } } diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c index 17bdbb99cd2..b9b97a70c44 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_state.c +++ b/src/mesa/drivers/dri/i965/brw_vs_state.c @@ -178,7 +178,7 @@ brw_upload_vs_unit(struct brw_context *brw) I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); } - brw->state.dirty.brw |= BRW_NEW_GEN4_UNIT_STATE; + brw->ctx.NewDriverState |= BRW_NEW_GEN4_UNIT_STATE; } const struct brw_tracked_state brw_vs_unit = { diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c index 709cb438f81..f82a62b4851 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c @@ -62,7 +62,7 @@ brw_upload_pull_constants(struct brw_context *brw, if (!prog_data->nr_pull_params) { if (stage_state->surf_offset[surf_index]) { stage_state->surf_offset[surf_index] = 0; - brw->state.dirty.brw |= brw_new_constbuf; + brw->ctx.NewDriverState |= brw_new_constbuf; } return; } @@ -98,7 +98,7 @@ brw_upload_pull_constants(struct brw_context *brw, dword_pitch); drm_intel_bo_unreference(const_bo); - brw->state.dirty.brw |= brw_new_constbuf; + brw->ctx.NewDriverState |= brw_new_constbuf; } diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c index 0dee1f857bb..afb4ebffc37 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_state.c @@ -237,7 +237,7 @@ brw_upload_wm_unit(struct brw_context *brw) I915_GEM_DOMAIN_INSTRUCTION, 0); } - brw->state.dirty.brw |= BRW_NEW_GEN4_UNIT_STATE; + brw->ctx.NewDriverState |= BRW_NEW_GEN4_UNIT_STATE; } const struct brw_tracked_state brw_wm_unit = { diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 828893bdc62..c9dac5be0b4 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -763,7 +763,7 @@ brw_update_renderbuffer_surfaces(struct brw_context *brw) brw, fb->Width, fb->Height, fb->Visual.samples, &brw->wm.base.surf_offset[surf_index]); } - brw->state.dirty.brw |= BRW_NEW_SURFACES; + brw->ctx.NewDriverState |= BRW_NEW_SURFACES; } const struct brw_tracked_state brw_renderbuffer_surfaces = { @@ -852,7 +852,7 @@ brw_update_texture_surfaces(struct brw_context *brw) update_stage_texture_surfaces(brw, fs, &brw->wm.base, true); } - brw->state.dirty.brw |= BRW_NEW_SURFACES; + brw->ctx.NewDriverState |= BRW_NEW_SURFACES; } const struct brw_tracked_state brw_texture_surfaces = { @@ -907,7 +907,7 @@ brw_upload_ubo_surfaces(struct brw_context *brw, } if (shader->NumUniformBlocks) - brw->state.dirty.brw |= BRW_NEW_SURFACES; + brw->ctx.NewDriverState |= BRW_NEW_SURFACES; } static void @@ -959,7 +959,7 @@ brw_upload_abo_surfaces(struct brw_context *brw, } if (prog->NumAtomicBuffers) - brw->state.dirty.brw |= BRW_NEW_SURFACES; + brw->ctx.NewDriverState |= BRW_NEW_SURFACES; } static void diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c b/src/mesa/drivers/dri/i965/gen6_sol.c index 0a66b1be5c6..be80d7bdfc5 100644 --- a/src/mesa/drivers/dri/i965/gen6_sol.c +++ b/src/mesa/drivers/dri/i965/gen6_sol.c @@ -85,7 +85,7 @@ gen6_update_sol_surfaces(struct brw_context *brw) } } - brw->state.dirty.brw |= BRW_NEW_SURFACES; + brw->ctx.NewDriverState |= BRW_NEW_SURFACES; } const struct brw_tracked_state gen6_sol_surface = { @@ -131,7 +131,7 @@ brw_gs_upload_binding_table(struct brw_context *brw) } if (!need_binding_table) { if (brw->ff_gs.bind_bo_offset != 0) { - brw->state.dirty.brw |= BRW_NEW_GS_BINDING_TABLE; + brw->ctx.NewDriverState |= BRW_NEW_GS_BINDING_TABLE; brw->ff_gs.bind_bo_offset = 0; } return; @@ -162,7 +162,7 @@ brw_gs_upload_binding_table(struct brw_context *brw) if (!need_binding_table) { if (brw->gs.base.bind_bo_offset != 0) { brw->gs.base.bind_bo_offset = 0; - brw->state.dirty.brw |= BRW_NEW_GS_BINDING_TABLE; + brw->ctx.NewDriverState |= BRW_NEW_GS_BINDING_TABLE; } return; } @@ -179,7 +179,7 @@ brw_gs_upload_binding_table(struct brw_context *brw) BRW_MAX_SURFACES * sizeof(uint32_t)); } - brw->state.dirty.brw |= BRW_NEW_GS_BINDING_TABLE; + brw->ctx.NewDriverState |= BRW_NEW_GS_BINDING_TABLE; } const struct brw_tracked_state gen6_gs_binding_table = { diff --git a/src/mesa/drivers/dri/i965/gen6_viewport_state.c b/src/mesa/drivers/dri/i965/gen6_viewport_state.c index 81546e49632..d80445272f8 100644 --- a/src/mesa/drivers/dri/i965/gen6_viewport_state.c +++ b/src/mesa/drivers/dri/i965/gen6_viewport_state.c @@ -63,7 +63,7 @@ gen6_upload_clip_vp(struct brw_context *brw) vp->ymin = -gby; vp->ymax = gby; - brw->state.dirty.brw |= BRW_NEW_CLIP_VP; + brw->ctx.NewDriverState |= BRW_NEW_CLIP_VP; } const struct brw_tracked_state gen6_clip_vp = { @@ -105,7 +105,7 @@ gen6_upload_sf_vp(struct brw_context *brw) sfv->viewport.m31 = v[MAT_TY] * y_scale + y_bias; sfv->viewport.m32 = v[MAT_TZ] * depth_scale; - brw->state.dirty.brw |= BRW_NEW_SF_VP; + brw->ctx.NewDriverState |= BRW_NEW_SF_VP; } const struct brw_tracked_state gen6_sf_vp = { diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c index 201f42e7ad5..d371c193577 100644 --- a/src/mesa/drivers/dri/i965/gen7_urb.c +++ b/src/mesa/drivers/dri/i965/gen7_urb.c @@ -94,7 +94,7 @@ gen7_allocate_push_constants(struct brw_context *brw) * Similar text exists for the other 3DSTATE_PUSH_CONSTANT_ALLOC_* * commands. */ - brw->state.dirty.brw |= BRW_NEW_PUSH_CONSTANT_ALLOCATION; + brw->ctx.NewDriverState |= BRW_NEW_PUSH_CONSTANT_ALLOCATION; } void @@ -152,7 +152,7 @@ gen7_upload_urb(struct brw_context *brw) /* If we're just switching between programs with the same URB requirements, * skip the rest of the logic. */ - if (!(brw->state.dirty.brw & BRW_NEW_CONTEXT) && + if (!(brw->ctx.NewDriverState & BRW_NEW_CONTEXT) && brw->urb.vsize == vs_size && brw->urb.gs_present == gs_present && brw->urb.gsize == gs_size) { diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c index 0e9b4fe83ca..278b3ec6d21 100644 --- a/src/mesa/drivers/dri/i965/gen7_vs_state.c +++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c @@ -66,7 +66,7 @@ gen7_upload_constant_state(struct brw_context *brw, * that is sent */ if (brw->gen >= 9) - brw->state.dirty.brw |= BRW_NEW_SURFACES; + brw->ctx.NewDriverState |= BRW_NEW_SURFACES; } diff --git a/src/mesa/drivers/dri/i965/gen8_misc_state.c b/src/mesa/drivers/dri/i965/gen8_misc_state.c index bd1d5cca611..88e425fa582 100644 --- a/src/mesa/drivers/dri/i965/gen8_misc_state.c +++ b/src/mesa/drivers/dri/i965/gen8_misc_state.c @@ -69,7 +69,7 @@ static void upload_state_base_address(struct brw_context *brw) } ADVANCE_BATCH(); - brw->state.dirty.brw |= BRW_NEW_STATE_BASE_ADDRESS; + brw->ctx.NewDriverState |= BRW_NEW_STATE_BASE_ADDRESS; } const struct brw_tracked_state gen8_state_base_address = { diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index 3cf44adf585..e522e4e9c1d 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c @@ -181,9 +181,9 @@ brw_new_batch(struct brw_context *brw) * purposes means everything). */ if (brw->hw_ctx == NULL) - brw->state.dirty.brw |= BRW_NEW_CONTEXT; + brw->ctx.NewDriverState |= BRW_NEW_CONTEXT; - brw->state.dirty.brw |= BRW_NEW_BATCH; + brw->ctx.NewDriverState |= BRW_NEW_BATCH; brw->state_batch_count = 0; diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c b/src/mesa/drivers/dri/i965/intel_buffer_objects.c index f2d2bcbe996..3b0a206d886 100644 --- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c +++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c @@ -107,11 +107,11 @@ alloc_buffer_object(struct brw_context *brw, /* the buffer might be bound as a uniform buffer, need to update it */ if (intel_obj->Base.UsageHistory & USAGE_UNIFORM_BUFFER) - brw->state.dirty.brw |= BRW_NEW_UNIFORM_BUFFER; + brw->ctx.NewDriverState |= BRW_NEW_UNIFORM_BUFFER; if (intel_obj->Base.UsageHistory & USAGE_TEXTURE_BUFFER) - brw->state.dirty.brw |= BRW_NEW_TEXTURE_BUFFER; + brw->ctx.NewDriverState |= BRW_NEW_TEXTURE_BUFFER; if (intel_obj->Base.UsageHistory & USAGE_ATOMIC_COUNTER_BUFFER) - brw->state.dirty.brw |= BRW_NEW_ATOMIC_BUFFER; + brw->ctx.NewDriverState |= BRW_NEW_ATOMIC_BUFFER; mark_buffer_inactive(intel_obj); } -- 2.30.2