From 4e6e8ba7c565df88c41b468fbf4801b7445dea09 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 8 Nov 2021 22:38:07 -0500 Subject: [PATCH] sim: cris: clean up missing func prototype warnings Move some unused funcs under existing #if 0 protection, mark a few local funcs as static, and add missing prototypes for the rest which are used from other files. This fixes all the fatal warnings in the mloop files so we can turn -Werror on here fully. --- sim/cris/Makefile.in | 3 --- sim/cris/cris-tmpl.c | 6 +++--- sim/cris/decodev10.h | 1 + sim/cris/decodev32.h | 2 ++ 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in index 8e6bb2ec79b..1fff75570fa 100644 --- a/sim/cris/Makefile.in +++ b/sim/cris/Makefile.in @@ -41,9 +41,6 @@ SIM_EXTRA_DEPS = \ SIM_EXTRA_CLEAN = cris-clean -# Some modules don't build cleanly yet. -crisv10f.o crisv32f.o: SIM_WERROR_CFLAGS = - ## COMMON_POST_CONFIG_FRAG arch = cris diff --git a/sim/cris/cris-tmpl.c b/sim/cris/cris-tmpl.c index c1153058cfb..223546d5091 100644 --- a/sim/cris/cris-tmpl.c +++ b/sim/cris/cris-tmpl.c @@ -196,6 +196,7 @@ MY (f_model_insn_after) (SIM_CPU *current_cpu, int last_p ATTRIBUTE_UNUSED, #endif } +#if 0 /* Initialize cycle counting for an insn. FIRST_P is non-zero if this is the first insn in a set of parallel insns. */ @@ -218,7 +219,6 @@ MY (f_model_update_insn_cycles) (SIM_CPU *current_cpu ATTRIBUTE_UNUSED, abort (); } -#if 0 void MY (f_model_record_cycles) (SIM_CPU *current_cpu, unsigned long cycles) { @@ -240,7 +240,7 @@ MY (f_model_mark_set_h_gr) (SIM_CPU *current_cpu, ARGBUF *abuf) /* Set the thread register contents. */ -void +static void MY (set_target_thread_data) (SIM_CPU *current_cpu, USI val) { (CPU (XCONCAT2 (h_sr_v, BASENUM) [CRIS_TLS_REGISTER])) = val; @@ -248,7 +248,7 @@ MY (set_target_thread_data) (SIM_CPU *current_cpu, USI val) /* Create the context for a thread. */ -void * +static void * MY (make_thread_cpu_data) (SIM_CPU *current_cpu, void *context) { void *info = xmalloc (current_cpu->thread_cpu_data_size); diff --git a/sim/cris/decodev10.h b/sim/cris/decodev10.h index 7baa9717f6f..6780592748b 100644 --- a/sim/cris/decodev10.h +++ b/sim/cris/decodev10.h @@ -30,6 +30,7 @@ extern const IDESC *crisv10f_decode (SIM_CPU *, IADDR, extern void crisv10f_init_idesc_table (SIM_CPU *); extern void crisv10f_sem_init_idesc_table (SIM_CPU *); extern void crisv10f_semf_init_idesc_table (SIM_CPU *); +extern void crisv10f_specific_init (SIM_CPU *); /* Enum declaration for instructions in cpu family crisv10f. */ typedef enum crisv10f_insn_type { diff --git a/sim/cris/decodev32.h b/sim/cris/decodev32.h index 72ebfe3d131..355fa69c5e6 100644 --- a/sim/cris/decodev32.h +++ b/sim/cris/decodev32.h @@ -30,6 +30,7 @@ extern const IDESC *crisv32f_decode (SIM_CPU *, IADDR, extern void crisv32f_init_idesc_table (SIM_CPU *); extern void crisv32f_sem_init_idesc_table (SIM_CPU *); extern void crisv32f_semf_init_idesc_table (SIM_CPU *); +extern void crisv32f_specific_init (SIM_CPU *); /* Enum declaration for instructions in cpu family crisv32f. */ typedef enum crisv32f_insn_type { @@ -126,6 +127,7 @@ extern int crisv32f_model_crisv32_u_exec_to_sr (SIM_CPU *, const IDESC *, int /* extern int crisv32f_model_crisv32_u_exec_movem (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rs*/, INT /*Rd*/); extern int crisv32f_model_crisv32_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rd*/, INT /*Rs*/, INT /*Rd*/); extern int crisv32f_model_crisv32_u_skip4 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); +extern int crisv32f_model_crisv32_u_stall (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); extern int crisv32f_model_crisv32_u_const32 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); extern int crisv32f_model_crisv32_u_const16 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); extern int crisv32f_model_crisv32_u_jump (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Pd*/); -- 2.30.2