From 4f97a20acdf8de9642256439b08054c196bf29d7 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sat, 28 Jan 2017 15:25:49 +0100 Subject: [PATCH] Rename "abc_bmc3" engine to "abc bmc3" --- sbysrc/demo.sby | 2 +- sbysrc/sby_bmc.py | 8 +++++--- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/sbysrc/demo.sby b/sbysrc/demo.sby index 5ec0803..c0fefc8 100644 --- a/sbysrc/demo.sby +++ b/sbysrc/demo.sby @@ -7,7 +7,7 @@ depth 10 smtbmc -s yices smtbmc -s boolector smtbmc -s z3 --nomem -abc_bmc3 +abc bmc3 [script] read_verilog -formal -norestrict -assume-asserts picorv32.v diff --git a/sbysrc/sby_bmc.py b/sbysrc/sby_bmc.py index 1b8eb4b..feaccf8 100644 --- a/sbysrc/sby_bmc.py +++ b/sbysrc/sby_bmc.py @@ -78,7 +78,9 @@ def run_smtbmc(job, engine_idx, engine): job.engine_tasks.append(task) -def run_abc_bmc3(job, engine_idx, engine): +def run_abc(job, engine_idx, engine): + assert engine == ["abc", "bmc3"] + task = SbyTask(job, "engine_%d" % engine_idx, job.model("aig"), ("cd %s; yosys-abc -c 'read_aiger model/design_aiger.aig; fold; strash; bmc3 -F %d -v; " + "undc -c; write_cex -a engine_%d/trace.aiw'") % (job.workdir, job.opt_depth, engine_idx), @@ -159,8 +161,8 @@ def run(job): if engine[0] == "smtbmc": run_smtbmc(job, engine_idx, engine) - elif engine[0] == "abc_bmc3": - run_abc_bmc3(job, engine_idx, engine) + elif engine[0] == "abc": + run_abc(job, engine_idx, engine) else: assert False -- 2.30.2