From 4fa008a718f06108a3ddc06200c7947e0212075c Mon Sep 17 00:00:00 2001 From: "Paul A. Clarke" Date: Fri, 26 Oct 2018 15:01:22 +0000 Subject: [PATCH] [rs6000] Fix _mm_extract_pi16 for big-endian For compatibility implementation of x86 vector intrinsic, _mm_extract_pi16, adjust shift value for big-endian mode. gcc/ChangeLog: 2018-10-25 Paul A. Clarke * config/rs6000/xmmintrin.h (_mm_extract_pi16): Fix for big-endian. From-SVN: r265531 --- gcc/ChangeLog | 4 ++++ gcc/config/rs6000/xmmintrin.h | 7 +++++-- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5307ec73531..3db373cc1d0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2018-10-26 Paul A. Clarke + + * config/rs6000/xmmintrin.h (_mm_extract_pi16): Fix for big-endian. + 2018-10-26 Richard Biener * tree-vect-slp.c (vect_mark_slp_stmts): Add visited hash_set diff --git a/gcc/config/rs6000/xmmintrin.h b/gcc/config/rs6000/xmmintrin.h index 528937552c6..86c41a82a31 100644 --- a/gcc/config/rs6000/xmmintrin.h +++ b/gcc/config/rs6000/xmmintrin.h @@ -1386,9 +1386,12 @@ _mm_load_ps1 (float const *__P) extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_extract_pi16 (__m64 const __A, int const __N) { - const int shiftr = (__N & 3) * 16; + unsigned int shiftr = __N & 3; +#ifdef __BIG_ENDIAN__ + shiftr = 3 - shiftr; +#endif - return ((__A >> shiftr) & 0xffff); + return ((__A >> (shiftr * 16)) & 0xffff); } extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) -- 2.30.2