From 4fbe6cf41996b882522baf8f76ae72384acc47fe Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Wed, 12 Aug 2020 13:16:21 +0100 Subject: [PATCH] arch-arm: Use isSecure variable for Stage2Lookup TLB entries are tagged with the security state of the cpu instead of the security attribute of the physical address Change-Id: I728ba1c841de1ec6c1ee03aee012b185c968d078 Signed-off-by: Giacomo Travaglini Reviewed-by: Nikos Nikoleris Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32639 Tested-by: kokoro --- src/arch/arm/tlb.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index dc4296d77..e8bb71805 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -1655,7 +1655,7 @@ TLB::getResultTe(TlbEntry **te, const RequestPtr &req, fault = checkPermissions(s1Te, req, mode); if (stage2Req & (fault == NoFault)) { Stage2LookUp *s2Lookup = new Stage2LookUp(this, stage2Tlb, *s1Te, - req, translation, mode, timing, functional, !(s1Te->ns), + req, translation, mode, timing, functional, isSecure, curTranType); fault = s2Lookup->getTe(tc, mergeTe); if (s2Lookup->isComplete()) { -- 2.30.2