From 4fe5e85a24cb858a0dc788a04db65c864de705b8 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 8 Jan 2022 15:42:58 +0000 Subject: [PATCH] enable microwatt mmu test2 --- src/soc/experiment/test/test_loadstore1.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/soc/experiment/test/test_loadstore1.py b/src/soc/experiment/test/test_loadstore1.py index eb31acf0..935c5aa5 100644 --- a/src/soc/experiment/test/test_loadstore1.py +++ b/src/soc/experiment/test/test_loadstore1.py @@ -890,7 +890,7 @@ def test_loadstore1_microwatt_mmu_bin_test2(): sim.add_sync_process(wrap(_test_loadstore1_microwatt_mmu_bin_test2(m, mem))) sim.add_sync_process(wrap(wb_get(cmpi.wb_bus(), mem))) - with sim.write_vcd('test_loadstore1.vcd'): + with sim.write_vcd('test_microwatt_mmu_test2.vcd'): sim.run() def test_loadstore1_misalign(): @@ -979,10 +979,10 @@ def test_loadstore1_ifetch_multi(): if __name__ == '__main__': #test_loadstore1() - #test_loadstore1_microwatt_mmu_bin_test2() + test_loadstore1_microwatt_mmu_bin_test2() #test_loadstore1_invalid() #test_loadstore1_ifetch() #FIXME #test_loadstore1_ifetch_invalid() #test_loadstore1_ifetch_unit_iface() # guess: should be working #test_loadstore1_ifetch_multi() - test_loadstore1_misalign() + #test_loadstore1_misalign() -- 2.30.2