From 506a9cca46eb765c5c974091cc68aedb969b8d8f Mon Sep 17 00:00:00 2001 From: lkcl Date: Fri, 6 May 2022 21:31:01 +0100 Subject: [PATCH] --- openpower/sv/SimpleV_rationale.mdwn | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn index 731397533..6cbc0ef66 100644 --- a/openpower/sv/SimpleV_rationale.mdwn +++ b/openpower/sv/SimpleV_rationale.mdwn @@ -611,7 +611,11 @@ of r6 therefore brings in an entirely new value *directly from memory*. Likewise on the second operand, r7, and likewise on the destination result which can be an automatic Coherent Store-and-increment -directly into Memory. +directly into Memory. In essence: + +*The act of "reading" or "writing" a register has been decoupled +and intercepted, then connected transparently to a completely +separate Coherent Memory Subsystem* On top of a barrel-architecture the slowness of Memory access was not a problem because the Deterministic nature of classic -- 2.30.2