From 50a87c1c0c72bc5d238e4e5a7fa93671c0ba4702 Mon Sep 17 00:00:00 2001
From: Will Schmidt <will_schmidt@vnet.ibm.com>
Date: Wed, 9 Aug 2017 19:11:03 +0000
Subject: [PATCH] fold-vec-pack-double.c: New.

[gcc/testsuite]

2017-08-09  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* gcc.target/powerpc/fold-vec-pack-double.c: New.
	* gcc.target/powerpc/fold-vec-pack-int.c: New.
	* gcc.target/powerpc/fold-vec-pack-longlong.c: New.
	* gcc.target/powerpc/fold-vec-pack-short.c: New.

From-SVN: r250998
---
 gcc/testsuite/ChangeLog                       |  7 +++++
 .../gcc.target/powerpc/fold-vec-pack-double.c | 18 ++++++++++++
 .../gcc.target/powerpc/fold-vec-pack-int.c    | 28 +++++++++++++++++++
 .../powerpc/fold-vec-pack-longlong.c          | 28 +++++++++++++++++++
 .../gcc.target/powerpc/fold-vec-pack-short.c  | 28 +++++++++++++++++++
 5 files changed, 109 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-pack-double.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-pack-int.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-pack-longlong.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-pack-short.c

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b5f06f26d8e..47a4536800e 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2017-08-09  Will Schmidt  <will_schmidt@vnet.ibm.com>
+
+	* gcc.target/powerpc/fold-vec-pack-double.c: New.
+	* gcc.target/powerpc/fold-vec-pack-int.c: New.
+	* gcc.target/powerpc/fold-vec-pack-longlong.c: New.
+	* gcc.target/powerpc/fold-vec-pack-short.c: New.
+
 2017-08-09  Will Schmidt  <will_schmidt@vnet.ibm.com>
 
 	* gcc.target/powerpc/fold-vec-msum-char.c: New.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-pack-double.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-pack-double.c
new file mode 100644
index 00000000000..29d049abe80
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-pack-double.c
@@ -0,0 +1,18 @@
+/* Verify that overloaded built-ins for vec_pack with
+   double inputs produce the right results.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mvsx -mpower8-vector -O2" } */
+
+#include <altivec.h>
+
+// vector float vec_pack (vector double, vector double);
+
+vector float
+test_pack (vector double vd2, vector double vd3)
+{
+  return vec_pack (vd2, vd3);
+}
+
+/* { dg-final { scan-assembler-times "vpkudum" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-pack-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-pack-int.c
new file mode 100644
index 00000000000..940faf36755
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-pack-int.c
@@ -0,0 +1,28 @@
+/* Verify that overloaded built-ins for vec_pack with int
+   inputs produce the right results.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2" } */
+
+#include <altivec.h>
+
+vector bool short
+testbi_h (vector bool int vbi2, vector bool int vbi3)
+{
+  return vec_pack (vbi2, vbi3);
+}
+
+vector signed short
+testsi_h (vector signed int vsi2, vector signed int vsi3)
+{
+  return vec_pack (vsi2, vsi3);
+}
+
+vector unsigned short
+testui_h (vector unsigned int vui2, vector unsigned int vui3)
+{
+  return vec_pack (vui2, vui3);
+}
+
+/* { dg-final { scan-assembler-times "vpkuwum" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-pack-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-pack-longlong.c
new file mode 100644
index 00000000000..d8acc3cf036
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-pack-longlong.c
@@ -0,0 +1,28 @@
+/* Verify that overloaded built-ins for vec_pack with long long
+   inputs produce the right results.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mvsx -mpower8-vector -O2" } */
+
+#include <altivec.h>
+
+vector bool int
+testbl_h (vector bool long long vbl2, vector bool long long vbl3)
+{
+  return vec_pack (vbl2, vbl3);
+}
+
+vector signed int
+testsl_h (vector signed long long vsl2, vector signed long long vsl3)
+{
+  return vec_pack (vsl2, vsl3);
+}
+
+vector unsigned int
+testul_h (vector unsigned long vul2, vector unsigned long vul3)
+{
+  return vec_pack (vul2, vul3);
+}
+
+/* { dg-final { scan-assembler-times "vpkudum" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-pack-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-pack-short.c
new file mode 100644
index 00000000000..37cd191dbd8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-pack-short.c
@@ -0,0 +1,28 @@
+/* Verify that overloaded built-ins for vec_pack with short
+   inputs produce the right results.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2" } */
+
+#include <altivec.h>
+
+vector bool char
+testbi_eh (vector bool short vbs2, vector bool short vbs3)
+{
+  return vec_pack (vbs2, vbs3);
+}
+
+vector signed char
+testsi_eh (vector signed short vss2, vector signed short vss3)
+{
+  return vec_pack (vss2, vss3);
+}
+
+vector unsigned char
+testui_eh (vector unsigned short vus2, vector unsigned short vus3)
+{
+  return vec_pack (vus2, vus3);
+}
+
+/* { dg-final { scan-assembler-times "vpkuhum" 3 } } */
-- 
2.30.2