From 50d38551eeee9c225bd1af2e2a403de9ea298a7e Mon Sep 17 00:00:00 2001 From: Ian Bolton Date: Fri, 24 May 2013 14:54:15 +0000 Subject: [PATCH] AArch64 - allow insv_imm to handle bigger immediates via masking to 16 bits From-SVN: r199293 --- gcc/ChangeLog | 7 +++++++ gcc/config/aarch64/aarch64.c | 4 ++-- gcc/config/aarch64/aarch64.md | 5 ++--- 3 files changed, 11 insertions(+), 5 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index dd36f0b33df..f607fdfb4f9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2013-05-24 Ian Bolton + + * config/aarch64/aarch64.c (aarch64_print_operand): Change the + X format specifier to only display bottom 16 bits. + * config/aarch64/aarch64.md (insv_imm): Allow any size of + immediate to match for operand 2, since it will be masked. + 2013-05-24 Richard Biener PR tree-optimization/57287 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 12a70558782..e580a1bcafc 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -3428,13 +3428,13 @@ aarch64_print_operand (FILE *f, rtx x, char code) break; case 'X': - /* Print integer constant in hex. */ + /* Print bottom 16 bits of integer constant in hex. */ if (GET_CODE (x) != CONST_INT) { output_operand_lossage ("invalid operand for '%%%c'", code); return; } - asm_fprintf (f, "0x%wx", UINTVAL (x)); + asm_fprintf (f, "0x%wx", UINTVAL (x) & 0xffff); break; case 'w': diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index e1ec48f5522..2bdbfa90bf7 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -858,9 +858,8 @@ (const_int 16) (match_operand:GPI 1 "const_int_operand" "n")) (match_operand:GPI 2 "const_int_operand" "n"))] - "INTVAL (operands[1]) < GET_MODE_BITSIZE (mode) - && INTVAL (operands[1]) % 16 == 0 - && UINTVAL (operands[2]) <= 0xffff" + "UINTVAL (operands[1]) < GET_MODE_BITSIZE (mode) + && UINTVAL (operands[1]) % 16 == 0" "movk\\t%0, %X2, lsl %1" [(set_attr "v8type" "movk") (set_attr "mode" "")] -- 2.30.2