From 51196c35916e8006a8cdefe194fe6ee333111c5f Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 22 May 2019 02:39:48 +0000 Subject: [PATCH] panfrost/midgard: Hoist some utility functions These were static to midgard_compile.c but are more generally useful across the compiler. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Ryan Houdek --- .../drivers/panfrost/midgard/helpers.h | 50 +++++++++++++++ .../panfrost/midgard/midgard_compile.c | 64 ------------------- .../drivers/panfrost/midgard/midgard_ops.h | 21 ++++++ 3 files changed, 71 insertions(+), 64 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/helpers.h b/src/gallium/drivers/panfrost/midgard/helpers.h index 9d287259a8a..cf3a63e7587 100644 --- a/src/gallium/drivers/panfrost/midgard/helpers.h +++ b/src/gallium/drivers/panfrost/midgard/helpers.h @@ -22,6 +22,8 @@ #ifndef __MDG_HELPERS_H #define __MDG_HELPERS_H +#include + #define OP_IS_STORE_VARY(op) (\ op == midgard_op_st_vary_16 || \ op == midgard_op_st_vary_32 \ @@ -158,4 +160,52 @@ struct mir_op_props { /* This file is common, so don't define the tables themselves. #include * midgard_op.h if you need that, or edit midgard_ops.c directly */ +/* Duplicate bits to convert standard 4-bit writemask to duplicated 8-bit + * format (or do the inverse). The 8-bit format only really matters for + * int8, as far as I know, where performance can be improved by using a + * vec8 output */ + +static inline unsigned +expand_writemask(unsigned mask) +{ + unsigned o = 0; + + for (int i = 0; i < 4; ++i) + if (mask & (1 << i)) + o |= (3 << (2 * i)); + + return o; +} + +static inline unsigned +squeeze_writemask(unsigned mask) +{ + unsigned o = 0; + + for (int i = 0; i < 4; ++i) + if (mask & (3 << (2 * i))) + o |= (1 << i); + + return o; + +} + +/* Coerce structs to integer */ + +static inline unsigned +vector_alu_srco_unsigned(midgard_vector_alu_src src) +{ + unsigned u; + memcpy(&u, &src, sizeof(src)); + return u; +} + +static inline midgard_vector_alu_src +vector_alu_from_unsigned(unsigned u) +{ + midgard_vector_alu_src s; + memcpy(&s, &u, sizeof(s)); + return s; +} + #endif diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers/panfrost/midgard/midgard_compile.c index 5f2cc4ba729..8433c4d32b2 100644 --- a/src/gallium/drivers/panfrost/midgard/midgard_compile.c +++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.c @@ -122,24 +122,6 @@ const midgard_scalar_alu_src blank_scalar_alu_src = { /* Used for encoding the unused source of 1-op instructions */ const midgard_vector_alu_src zero_alu_src = { 0 }; -/* Coerce structs to integer */ - -static unsigned -vector_alu_srco_unsigned(midgard_vector_alu_src src) -{ - unsigned u; - memcpy(&u, &src, sizeof(src)); - return u; -} - -static midgard_vector_alu_src -vector_alu_from_unsigned(unsigned u) -{ - midgard_vector_alu_src s; - memcpy(&s, &u, sizeof(s)); - return s; -} - /* Inputs a NIR ALU source, with modifiers attached if necessary, and outputs * the corresponding Midgard source */ @@ -531,52 +513,6 @@ emit_load_const(compiler_context *ctx, nir_load_const_instr *instr) _mesa_hash_table_u64_insert(ctx->ssa_constants, def.index + 1, v); } -/* Duplicate bits to convert sane 4-bit writemask to obscure 8-bit format (or - * do the inverse) */ - -static unsigned -expand_writemask(unsigned mask) -{ - unsigned o = 0; - - for (int i = 0; i < 4; ++i) - if (mask & (1 << i)) - o |= (3 << (2 * i)); - - return o; -} - -static unsigned -squeeze_writemask(unsigned mask) -{ - unsigned o = 0; - - for (int i = 0; i < 4; ++i) - if (mask & (3 << (2 * i))) - o |= (1 << i); - - return o; - -} - -/* Determines effective writemask, taking quirks and expansion into account */ -static unsigned -effective_writemask(midgard_vector_alu *alu) -{ - /* Channel count is off-by-one to fit in two-bits (0 channel makes no - * sense) */ - - unsigned channel_count = GET_CHANNEL_COUNT(alu_opcode_props[alu->op].props); - - /* If there is a fixed channel count, construct the appropriate mask */ - - if (channel_count) - return (1 << channel_count) - 1; - - /* Otherwise, just squeeze the existing mask */ - return squeeze_writemask(alu->mask); -} - static unsigned nir_src_index(compiler_context *ctx, nir_src *src) { diff --git a/src/gallium/drivers/panfrost/midgard/midgard_ops.h b/src/gallium/drivers/panfrost/midgard/midgard_ops.h index 8b363529aa9..78b999a8dc6 100644 --- a/src/gallium/drivers/panfrost/midgard/midgard_ops.h +++ b/src/gallium/drivers/panfrost/midgard/midgard_ops.h @@ -51,3 +51,24 @@ midgard_is_integer_out_op(int op) return is_int ^ is_conversion; } + +/* Determines effective writemask, taking quirks and expansion into account */ +static inline unsigned +effective_writemask(midgard_vector_alu *alu) +{ + /* Channel count is off-by-one to fit in two-bits (0 channel makes no + * sense) */ + + unsigned channel_count = GET_CHANNEL_COUNT(alu_opcode_props[alu->op].props); + + /* If there is a fixed channel count, construct the appropriate mask */ + + if (channel_count) + return (1 << channel_count) - 1; + + /* Otherwise, just squeeze the existing mask */ + return squeeze_writemask(alu->mask); +} + + + -- 2.30.2