From 516d45f78a3bbab0288c49c0f876ebdf4ad05bff Mon Sep 17 00:00:00 2001 From: Francisco Jerez Date: Wed, 18 Mar 2015 21:19:28 +0200 Subject: [PATCH] i965/vec4: Some more trivial swizzle clean-up. Reviewed-by: Matt Turner --- src/mesa/drivers/dri/i965/brw_ir_vec4.h | 6 +----- src/mesa/drivers/dri/i965/brw_reg.h | 6 ++---- src/mesa/drivers/dri/i965/brw_vec4.cpp | 8 ++------ .../dri/i965/brw_vec4_copy_propagation.cpp | 6 +++--- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 15 +++------------ 5 files changed, 11 insertions(+), 30 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_ir_vec4.h b/src/mesa/drivers/dri/i965/brw_ir_vec4.h index def61ff8bae..d3bd64dbb71 100644 --- a/src/mesa/drivers/dri/i965/brw_ir_vec4.h +++ b/src/mesa/drivers/dri/i965/brw_ir_vec4.h @@ -83,11 +83,7 @@ static inline src_reg swizzle(src_reg reg, unsigned swizzle) { assert(reg.file != HW_REG); - reg.swizzle = BRW_SWIZZLE4( - BRW_GET_SWZ(reg.swizzle, BRW_GET_SWZ(swizzle, 0)), - BRW_GET_SWZ(reg.swizzle, BRW_GET_SWZ(swizzle, 1)), - BRW_GET_SWZ(reg.swizzle, BRW_GET_SWZ(swizzle, 2)), - BRW_GET_SWZ(reg.swizzle, BRW_GET_SWZ(swizzle, 3))); + reg.swizzle = brw_compose_swizzle(swizzle, reg.swizzle); return reg; } diff --git a/src/mesa/drivers/dri/i965/brw_reg.h b/src/mesa/drivers/dri/i965/brw_reg.h index c7cd194be5e..924b05914cf 100644 --- a/src/mesa/drivers/dri/i965/brw_reg.h +++ b/src/mesa/drivers/dri/i965/brw_reg.h @@ -895,10 +895,8 @@ brw_swizzle(struct brw_reg reg, unsigned x, unsigned y, unsigned z, unsigned w) { assert(reg.file != BRW_IMMEDIATE_VALUE); - reg.dw1.bits.swizzle = BRW_SWIZZLE4(BRW_GET_SWZ(reg.dw1.bits.swizzle, x), - BRW_GET_SWZ(reg.dw1.bits.swizzle, y), - BRW_GET_SWZ(reg.dw1.bits.swizzle, z), - BRW_GET_SWZ(reg.dw1.bits.swizzle, w)); + reg.dw1.bits.swizzle = brw_compose_swizzle(BRW_SWIZZLE4(x, y, z, w), + reg.dw1.bits.swizzle); return reg; } diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 68ec4e34550..9e702302f41 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -563,12 +563,8 @@ vec4_visitor::pack_uniform_registers() continue; inst->src[i].reg = new_loc[src]; - - int sx = BRW_GET_SWZ(inst->src[i].swizzle, 0) + new_chan[src]; - int sy = BRW_GET_SWZ(inst->src[i].swizzle, 1) + new_chan[src]; - int sz = BRW_GET_SWZ(inst->src[i].swizzle, 2) + new_chan[src]; - int sw = BRW_GET_SWZ(inst->src[i].swizzle, 3) + new_chan[src]; - inst->src[i].swizzle = BRW_SWIZZLE4(sx, sy, sz, sw); + inst->src[i].swizzle += BRW_SWIZZLE4(new_chan[src], new_chan[src], + new_chan[src], new_chan[src]); } } } diff --git a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp index 1f5e4f76cdd..ea1732d0bf6 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp @@ -274,10 +274,10 @@ try_copy_propagate(struct brw_context *brw, vec4_instruction *inst, */ int s[4]; for (int i = 0; i < 4; i++) { - s[i] = BRW_GET_SWZ(entry->value[i]->swizzle, - BRW_GET_SWZ(inst->src[arg].swizzle, i)); + s[i] = BRW_GET_SWZ(entry->value[i]->swizzle, i); } - value.swizzle = BRW_SWIZZLE4(s[0], s[1], s[2], s[3]); + value.swizzle = brw_compose_swizzle(inst->src[arg].swizzle, + BRW_SWIZZLE4(s[0], s[1], s[2], s[3])); if (value.file != UNIFORM && value.file != GRF && diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index f83b8590329..26a3b9f4956 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -3334,18 +3334,9 @@ vec4_visitor::emit_scratch_write(bblock_t *block, vec4_instruction *inst, * weren't initialized, it will confuse live interval analysis, which will * make spilling fail to make progress. */ - src_reg temp = src_reg(this, glsl_type::vec4_type); - temp.type = inst->dst.type; - int first_writemask_chan = ffs(inst->dst.writemask) - 1; - int swizzles[4]; - for (int i = 0; i < 4; i++) - if (inst->dst.writemask & (1 << i)) - swizzles[i] = i; - else - swizzles[i] = first_writemask_chan; - temp.swizzle = BRW_SWIZZLE4(swizzles[0], swizzles[1], - swizzles[2], swizzles[3]); - + const src_reg temp = swizzle(retype(src_reg(this, glsl_type::vec4_type), + inst->dst.type), + brw_swizzle_for_mask(inst->dst.writemask)); dst_reg dst = dst_reg(brw_writemask(brw_vec8_grf(0, 0), inst->dst.writemask)); vec4_instruction *write = SCRATCH_WRITE(dst, temp, index); -- 2.30.2