From 51db950419b810243468b6aa626b154b3fdc94f0 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Wed, 5 Jun 2019 01:37:01 -0400 Subject: [PATCH] radeonsi/gfx10: disable DCC with MSAA It was only enabled for 2x MSAA anyway. Acked-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_texture.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 7b72e51065c..7bbffe359b3 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -289,10 +289,15 @@ static int si_init_surface(struct si_screen *sscreen, flags |= RADEON_SURF_DISABLE_DCC; /* GFX9: DCC clear for 4x and 8x MSAA textures unimplemented. */ - if (sscreen->info.chip_class >= GFX9 && + if (sscreen->info.chip_class == GFX9 && ptex->nr_storage_samples >= 4) flags |= RADEON_SURF_DISABLE_DCC; + /* TODO: GFX10: DCC causes corruption with MSAA. */ + if (sscreen->info.chip_class >= GFX10 && + ptex->nr_storage_samples >= 2) + flags |= RADEON_SURF_DISABLE_DCC; + if (ptex->bind & PIPE_BIND_SCANOUT || is_scanout) { /* This should catch bugs in gallium users setting incorrect flags. */ assert(ptex->nr_samples <= 1 && -- 2.30.2