From 51fcc5132137b96c322c9803f84ed934e352cd5f Mon Sep 17 00:00:00 2001 From: Andrew Bennett Date: Fri, 28 Aug 2015 13:35:01 +0000 Subject: [PATCH] MIPS: Add the lo register to the clobber list in the madd-8.c and msub-8.c testcases. The lo register is not listed in the clobber list in the inline asm statement for the madd-8.c and msub-8.c testcases. This means that when building for the n64 ABI GCC is free to use the lo register instead of the stack when saving/restoring the clobbered registers. Then then means that it decides to use the msub/madd instruction to perform the "x - y * z" operation rather than using mul; addu/subu which the test is looking for. testsuite/ * gcc.target/mips/madd-8.c: Add lo register to clobber list. * gcc.target/mips/msub-8.c: Ditto. From-SVN: r227299 --- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/mips/madd-8.c | 2 +- gcc/testsuite/gcc.target/mips/msub-8.c | 2 +- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 93e13840f2a..a6f1ce8984e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-08-28 Andrew Bennett + + * gcc.target/mips/madd-8.c: Add lo register to clobber list. + * gcc.target/mips/msub-8.c: Ditto + 2015-08-27 Bill Schmidt * lib/target-supports.exp (check-effective_target_vect_double): diff --git a/gcc/testsuite/gcc.target/mips/madd-8.c b/gcc/testsuite/gcc.target/mips/madd-8.c index 794a6ff1727..56c194788a1 100644 --- a/gcc/testsuite/gcc.target/mips/madd-8.c +++ b/gcc/testsuite/gcc.target/mips/madd-8.c @@ -11,6 +11,6 @@ f2 (int x, int y, int z) asm volatile ("" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", - "$31"); + "$31", "lo"); return x * y + z; } diff --git a/gcc/testsuite/gcc.target/mips/msub-8.c b/gcc/testsuite/gcc.target/mips/msub-8.c index a66307f1041..b0f1523cf31 100644 --- a/gcc/testsuite/gcc.target/mips/msub-8.c +++ b/gcc/testsuite/gcc.target/mips/msub-8.c @@ -11,6 +11,6 @@ f2 (int x, int y, int z) asm volatile ("" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", - "$31"); + "$31", "lo"); return x - y * z; } -- 2.30.2