From 52a661a6277cf517aa56b013c83d204982fab9c8 Mon Sep 17 00:00:00 2001 From: Jan Hubicka Date: Thu, 26 Apr 2001 20:33:25 +0200 Subject: [PATCH] * (ix86_expand_fp_movcc): Re-enable SSE conditional move generation. From-SVN: r41602 --- gcc/ChangeLog | 4 ++++ gcc/config/i386/i386.c | 3 +-- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 05ebf9fb53d..dc1876d03a8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +Thu Apr 26 20:28:21 CEST 2001 Jan Hubicka + + * (ix86_expand_fp_movcc): Re-enable SSE conditional move generation. + Thu Apr 26 19:20:28 CEST 2001 Jan Hubicka * i386.md (abs/neg splitter): Fix calculation of sign bit for TFmodes diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index a0e40ba309e..9831811158d 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -6613,8 +6613,7 @@ ix86_expand_fp_movcc (operands) /* We may be called from the post-reload splitter. */ && (!REG_P (operands[0]) || SSE_REG_P (operands[0]) - || REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER) - && 0) + || REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)) { rtx op0 = ix86_compare_op0, op1 = ix86_compare_op1; code = GET_CODE (operands[1]); -- 2.30.2