From 52a96449f5ebfa35196a5358fd58b807fa3ea7c4 Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Tue, 7 Apr 2020 14:01:56 +0100 Subject: [PATCH] arch-arm: Override ISA::takeOverFrom for the Arm ISA This is fixing switcheroo tests when using a PMU/GICv3. When you switch cpus you usually instantiate multiple cpus at the beginning and you switch them at runtime with the m5.switchCpus function. Every cpu will have its own set of ThreadContexts/ISAs. When you switch cpu/tc/isa, you need to update the tc/isa pointer cached in the device model otherwise those will still reference the switched out cpu. Change-Id: I3aeee890286851189c3a8a4d378c83f32e973361 Signed-off-by: Giacomo Travaglini Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27713 Reviewed-by: Ciro Santilli Tested-by: kokoro --- src/arch/arm/isa.cc | 10 ++++++++++ src/arch/arm/isa.hh | 3 +++ 2 files changed, 13 insertions(+) diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc index a3e0ce6c2..b3d6726d9 100644 --- a/src/arch/arm/isa.cc +++ b/src/arch/arm/isa.cc @@ -437,6 +437,16 @@ ISA::startup(ThreadContext *tc) afterStartup = true; } +void +ISA::takeOverFrom(ThreadContext *new_tc, ThreadContext *old_tc) +{ + pmu->setThreadContext(new_tc); + + if (system && gicv3CpuInterface) { + gicv3CpuInterface->setISA(this); + gicv3CpuInterface->setThreadContext(new_tc); + } +} RegVal ISA::readMiscRegNoEffect(int misc_reg) const diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh index 8f2e0d26b..5fec2dbb9 100644 --- a/src/arch/arm/isa.hh +++ b/src/arch/arm/isa.hh @@ -743,6 +743,9 @@ namespace ArmISA void startup(ThreadContext *tc); + void takeOverFrom(ThreadContext *new_tc, + ThreadContext *old_tc) override; + Enums::DecoderFlavor decoderFlavor() const { return _decoderFlavor; } /** Returns true if the ISA has a GICv3 cpu interface */ -- 2.30.2