From 5346630593bec80efa732c40b63e0e95a00af074 Mon Sep 17 00:00:00 2001 From: Timothy Arceri Date: Thu, 20 Oct 2016 15:27:35 +1100 Subject: [PATCH] r200/glsl/st/mesa: use common outputs written field MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit And set outputs written directly in shader_info. st/mesa changes where: Reviewed-by: Marek Olšák Reviewed-by: Jason Ekstrand --- src/compiler/glsl/ir_set_program_inouts.cpp | 12 ++++++------ src/compiler/shader_info.c | 1 - src/mesa/drivers/dri/r200/r200_tcl.c | 2 +- src/mesa/drivers/dri/r200/r200_vertprog.c | 11 ++++++----- src/mesa/main/context.c | 2 +- src/mesa/main/ff_fragment_shader.cpp | 2 +- src/mesa/main/ffvertex_prog.c | 4 ++-- src/mesa/main/mtypes.h | 1 - src/mesa/program/arbprogparse.c | 4 ++-- src/mesa/program/prog_print.c | 3 ++- src/mesa/program/prog_to_nir.c | 5 ++--- src/mesa/program/program_parse.y | 2 +- src/mesa/program/programopt.c | 8 ++++---- src/mesa/state_tracker/st_atifs_to_tgsi.c | 2 +- src/mesa/state_tracker/st_atom_rasterizer.c | 6 ++++-- src/mesa/state_tracker/st_atom_shader.c | 2 +- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 3 ++- src/mesa/state_tracker/st_program.c | 6 +++--- src/mesa/swrast/s_context.c | 3 ++- src/mesa/swrast/s_fragprog.c | 6 +++--- src/mesa/swrast/s_span.c | 2 +- src/mesa/tnl/t_context.c | 3 ++- src/mesa/tnl/t_vb_program.c | 7 ++++--- 23 files changed, 51 insertions(+), 46 deletions(-) diff --git a/src/compiler/glsl/ir_set_program_inouts.cpp b/src/compiler/glsl/ir_set_program_inouts.cpp index d693b660cbf..9a33d56d881 100644 --- a/src/compiler/glsl/ir_set_program_inouts.cpp +++ b/src/compiler/glsl/ir_set_program_inouts.cpp @@ -24,13 +24,13 @@ /** * \file ir_set_program_inouts.cpp * - * Sets the inputs_read and OutputsWritten of Mesa programs. + * Sets the inputs_read and outputs_written of Mesa programs. * * Mesa programs (gl_program, not gl_shader_program) have a set of * flags indicating which varyings are read and written. Computing * which are actually read from some sort of backend code can be * tricky when variable array indexing involved. So this pass - * provides support for setting inputs_read and OutputsWritten right + * provides support for setting inputs_read and outputs_written right * from the GLSL IR. */ @@ -83,10 +83,10 @@ mark(struct gl_program *prog, ir_variable *var, int offset, int len, { /* As of GLSL 1.20, varyings can only be floats, floating-point * vectors or matrices, or arrays of them. For Mesa programs using - * inputs_read/OutputsWritten, everything but matrices uses one + * inputs_read/outputs_written, everything but matrices uses one * slot, while matrices use a slot per column. Presumably * something doing a more clever packing would use something other - * than inputs_read/OutputsWritten. + * than inputs_read/outputs_written. */ for (int i = 0; i < len; i++) { @@ -130,7 +130,7 @@ mark(struct gl_program *prog, ir_variable *var, int offset, int len, if (is_patch_generic) { prog->PatchOutputsWritten |= bitfield; } else if (!var->data.read_only) { - prog->OutputsWritten |= bitfield; + prog->info.outputs_written |= bitfield; if (var->data.index > 0) prog->SecondaryOutputsWritten |= bitfield; } @@ -427,7 +427,7 @@ do_set_program_inouts(exec_list *instructions, struct gl_program *prog, ir_set_program_inouts_visitor v(prog, shader_stage); prog->info.inputs_read = 0; - prog->OutputsWritten = 0; + prog->info.outputs_written = 0; prog->SecondaryOutputsWritten = 0; prog->OutputsRead = 0; prog->PatchInputsRead = 0; diff --git a/src/compiler/shader_info.c b/src/compiler/shader_info.c index df1abdd2e7a..355bee0f040 100644 --- a/src/compiler/shader_info.c +++ b/src/compiler/shader_info.c @@ -30,7 +30,6 @@ copy_shader_info(const struct gl_shader_program *shader_prog, { shader_info *info = &sh->Program->info; - info->outputs_written = sh->Program->OutputsWritten; info->outputs_read = sh->Program->OutputsRead; info->patch_inputs_read = sh->Program->PatchInputsRead; info->patch_outputs_written = sh->Program->PatchOutputsWritten; diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c index b556c866503..26968afc644 100644 --- a/src/mesa/drivers/dri/r200/r200_tcl.c +++ b/src/mesa/drivers/dri/r200/r200_tcl.c @@ -427,7 +427,7 @@ static GLboolean r200_run_tcl_render( struct gl_context *ctx, We only need to change compsel. */ GLuint out_compsel = 0; const GLbitfield64 vp_out = - rmesa->curr_vp_hw->mesa_program.OutputsWritten; + rmesa->curr_vp_hw->mesa_program.info.outputs_written; vimap_rev = &rmesa->curr_vp_hw->inputmap_rev[0]; assert(vp_out & BITFIELD64_BIT(VARYING_SLOT_POS)); diff --git a/src/mesa/drivers/dri/r200/r200_vertprog.c b/src/mesa/drivers/dri/r200/r200_vertprog.c index b4574a7eed5..3f1d53e7270 100644 --- a/src/mesa/drivers/dri/r200/r200_vertprog.c +++ b/src/mesa/drivers/dri/r200/r200_vertprog.c @@ -425,14 +425,14 @@ static GLboolean r200_translate_vertex_program(struct gl_context *ctx, struct r2 } #endif - if ((mesa_vp->OutputsWritten & + if ((mesa_vp->info.outputs_written & ~((1 << VARYING_SLOT_POS) | (1 << VARYING_SLOT_COL0) | (1 << VARYING_SLOT_COL1) | (1 << VARYING_SLOT_FOGC) | (1 << VARYING_SLOT_TEX0) | (1 << VARYING_SLOT_TEX1) | (1 << VARYING_SLOT_TEX2) | (1 << VARYING_SLOT_TEX3) | (1 << VARYING_SLOT_TEX4) | (1 << VARYING_SLOT_TEX5) | (1 << VARYING_SLOT_PSIZ))) != 0) { if (R200_DEBUG & RADEON_FALLBACKS) { fprintf(stderr, "can't handle vert prog outputs 0x%llx\n", - (unsigned long long) mesa_vp->OutputsWritten); + (unsigned long long) mesa_vp->info.outputs_written); } return GL_FALSE; } @@ -447,13 +447,14 @@ static GLboolean r200_translate_vertex_program(struct gl_context *ctx, struct r2 /* FIXME: is changing the prog safe to do here? */ if (mesa_vp->IsPositionInvariant && /* make sure we only do this once */ - !(mesa_vp->OutputsWritten & (1 << VARYING_SLOT_POS))) { + !(mesa_vp->info.outputs_written & (1 << VARYING_SLOT_POS))) { _mesa_insert_mvp_code(ctx, mesa_vp); } /* for fogc, can't change mesa_vp, as it would hose swtnl, and exp with base e isn't directly available neither. */ - if ((mesa_vp->OutputsWritten & (1 << VARYING_SLOT_FOGC)) && !vp->fogpidx) { + if ((mesa_vp->info.outputs_written & (1 << VARYING_SLOT_FOGC)) && + !vp->fogpidx) { struct gl_program_parameter_list *paramList; gl_state_index tokens[STATE_LENGTH] = { STATE_FOG_PARAMS, 0, 0, 0, 0 }; paramList = mesa_vp->Parameters; @@ -575,7 +576,7 @@ static GLboolean r200_translate_vertex_program(struct gl_context *ctx, struct r2 } } - if (!(mesa_vp->OutputsWritten & (1 << VARYING_SLOT_POS))) { + if (!(mesa_vp->info.outputs_written & (1 << VARYING_SLOT_POS))) { if (R200_DEBUG & RADEON_FALLBACKS) { fprintf(stderr, "can't handle vert prog without position output\n"); } diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c index 65c1b6d0b38..5aaf150e019 100644 --- a/src/mesa/main/context.c +++ b/src/mesa/main/context.c @@ -741,7 +741,7 @@ check_context_limits(struct gl_context *ctx) /* check that we don't exceed the size of various bitfields */ assert(VARYING_SLOT_MAX <= - (8 * sizeof(ctx->VertexProgram._Current->OutputsWritten))); + (8 * sizeof(ctx->VertexProgram._Current->info.outputs_written))); assert(VARYING_SLOT_MAX <= (8 * sizeof(ctx->FragmentProgram._Current->info.inputs_read))); diff --git a/src/mesa/main/ff_fragment_shader.cpp b/src/mesa/main/ff_fragment_shader.cpp index 530033579e9..9aa1dc15cdc 100644 --- a/src/mesa/main/ff_fragment_shader.cpp +++ b/src/mesa/main/ff_fragment_shader.cpp @@ -370,7 +370,7 @@ static GLbitfield get_fp_input_mask( struct gl_context *ctx ) else vprog = ctx->VertexProgram.Current; - vp_outputs = vprog->OutputsWritten; + vp_outputs = vprog->info.outputs_written; /* These get generated in the setup routine regardless of the * vertex program: diff --git a/src/mesa/main/ffvertex_prog.c b/src/mesa/main/ffvertex_prog.c index 00409cc71df..8cec1cbaa60 100644 --- a/src/mesa/main/ffvertex_prog.c +++ b/src/mesa/main/ffvertex_prog.c @@ -461,7 +461,7 @@ static struct ureg register_input( struct tnl_program *p, GLuint input ) */ static struct ureg register_output( struct tnl_program *p, GLuint output ) { - p->program->OutputsWritten |= BITFIELD64_BIT(output); + p->program->info.outputs_written |= BITFIELD64_BIT(output); return make_ureg(PROGRAM_OUTPUT, output); } @@ -1640,7 +1640,7 @@ create_new_program( const struct state_key *key, p.program->NumAttributes = p.program->NumAddressRegs = 0; p.program->Parameters = _mesa_new_parameter_list(); p.program->info.inputs_read = 0; - p.program->OutputsWritten = 0; + p.program->info.outputs_written = 0; build_tnl_program( &p ); } diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index 7283f44d3d3..0b8844c2165 100644 --- a/src/mesa/main/mtypes.h +++ b/src/mesa/main/mtypes.h @@ -1922,7 +1922,6 @@ struct gl_program struct shader_info info; - GLbitfield64 OutputsWritten; /**< Bitmask of which output regs are written */ GLbitfield64 SecondaryOutputsWritten; /**< Subset of OutputsWritten outputs written with non-zero index. */ GLbitfield64 OutputsRead; /**< Bitmask of which output regs are read */ GLbitfield PatchInputsRead; /**< VAR[0..31] usage for patch inputs (user-defined only) */ diff --git a/src/mesa/program/arbprogparse.c b/src/mesa/program/arbprogparse.c index 53f661f64f4..e545d710e52 100644 --- a/src/mesa/program/arbprogparse.c +++ b/src/mesa/program/arbprogparse.c @@ -108,7 +108,7 @@ _mesa_parse_arb_fragment_program(struct gl_context* ctx, GLenum target, program->NumNativeTexInstructions = prog.NumTexInstructions; program->NumNativeTexIndirections = prog.NumTexIndirections; program->info.inputs_read = prog.info.inputs_read; - program->OutputsWritten = prog.OutputsWritten; + program->info.outputs_written = prog.info.outputs_written; program->IndirectRegisterFiles = prog.IndirectRegisterFiles; for (i = 0; i < MAX_TEXTURE_IMAGE_UNITS; i++) { program->TexturesUsed[i] = prog.TexturesUsed[i]; @@ -197,7 +197,7 @@ _mesa_parse_arb_vertex_program(struct gl_context *ctx, GLenum target, program->NumNativeAttributes = prog.NumNativeAttributes; program->NumNativeAddressRegs = prog.NumNativeAddressRegs; program->info.inputs_read = prog.info.inputs_read; - program->OutputsWritten = prog.OutputsWritten; + program->info.outputs_written = prog.info.outputs_written; program->IndirectRegisterFiles = prog.IndirectRegisterFiles; program->IsPositionInvariant = (state.option.PositionInvariant) ? GL_TRUE : GL_FALSE; diff --git a/src/mesa/program/prog_print.c b/src/mesa/program/prog_print.c index 19d578579ee..182da6df449 100644 --- a/src/mesa/program/prog_print.c +++ b/src/mesa/program/prog_print.c @@ -874,7 +874,8 @@ _mesa_fprint_program_parameters(FILE *f, fprintf(f, "InputsRead: %" PRIx64 " (0b%s)\n", (uint64_t) prog->info.inputs_read, binary(prog->info.inputs_read)); fprintf(f, "OutputsWritten: %" PRIx64 " (0b%s)\n", - (uint64_t) prog->OutputsWritten, binary(prog->OutputsWritten)); + (uint64_t) prog->info.outputs_written, + binary(prog->info.outputs_written)); fprintf(f, "NumInstructions=%d\n", prog->NumInstructions); fprintf(f, "NumTemporaries=%d\n", prog->NumTemporaries); fprintf(f, "NumParameters=%d\n", prog->NumParameters); diff --git a/src/mesa/program/prog_to_nir.c b/src/mesa/program/prog_to_nir.c index 9c3ebc01644..3c62456106c 100644 --- a/src/mesa/program/prog_to_nir.c +++ b/src/mesa/program/prog_to_nir.c @@ -945,11 +945,11 @@ setup_registers_and_variables(struct ptn_compile *c) } /* Create output registers and variables. */ - int max_outputs = util_last_bit(c->prog->OutputsWritten); + int max_outputs = util_last_bit(c->prog->info.outputs_written); c->output_regs = rzalloc_array(c, nir_register *, max_outputs); for (int i = 0; i < max_outputs; i++) { - if (!(c->prog->OutputsWritten & BITFIELD64_BIT(i))) + if (!(c->prog->info.outputs_written & BITFIELD64_BIT(i))) continue; /* Since we can't load from outputs in the IR, we make temporaries @@ -1051,7 +1051,6 @@ prog_to_nir(const struct gl_program *prog, s->info->num_abos = 0; s->info->num_ssbos = 0; s->info->num_images = 0; - s->info->outputs_written = prog->OutputsWritten; s->info->system_values_read = prog->SystemValuesRead; s->info->uses_texture_gather = false; s->info->uses_clip_distance_out = false; diff --git a/src/mesa/program/program_parse.y b/src/mesa/program/program_parse.y index 2210c0ce8a8..41aeb241ffe 100644 --- a/src/mesa/program/program_parse.y +++ b/src/mesa/program/program_parse.y @@ -594,7 +594,7 @@ maskedDstReg: dstReg optionalMask YYERROR; } - state->prog->OutputsWritten |= BITFIELD64_BIT($$.Index); + state->prog->info.outputs_written |= BITFIELD64_BIT($$.Index); } } ; diff --git a/src/mesa/program/programopt.c b/src/mesa/program/programopt.c index 3c9839bf248..b4bbbdae76b 100644 --- a/src/mesa/program/programopt.c +++ b/src/mesa/program/programopt.c @@ -108,7 +108,7 @@ _mesa_insert_mvp_dp4_code(struct gl_context *ctx, struct gl_program *vprog) vprog->Instructions = newInst; vprog->NumInstructions = newLen; vprog->info.inputs_read |= VERT_BIT_POS; - vprog->OutputsWritten |= BITFIELD64_BIT(VARYING_SLOT_POS); + vprog->info.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_POS); } @@ -209,7 +209,7 @@ _mesa_insert_mvp_mad_code(struct gl_context *ctx, struct gl_program *vprog) vprog->Instructions = newInst; vprog->NumInstructions = newLen; vprog->info.inputs_read |= VERT_BIT_POS; - vprog->OutputsWritten |= BITFIELD64_BIT(VARYING_SLOT_POS); + vprog->info.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_POS); } @@ -264,7 +264,7 @@ _mesa_append_fog_code(struct gl_context *ctx, struct gl_program *fprog, return; } - if (!(fprog->OutputsWritten & (1 << FRAG_RESULT_COLOR))) { + if (!(fprog->info.outputs_written & (1 << FRAG_RESULT_COLOR))) { /* program doesn't output color, so nothing to do */ return; } @@ -409,7 +409,7 @@ _mesa_append_fog_code(struct gl_context *ctx, struct gl_program *fprog, fprog->Instructions = newInst; fprog->NumInstructions = inst - newInst; fprog->info.inputs_read |= VARYING_BIT_FOGC; - assert(fprog->OutputsWritten & (1 << FRAG_RESULT_COLOR)); + assert(fprog->info.outputs_written & (1 << FRAG_RESULT_COLOR)); } diff --git a/src/mesa/state_tracker/st_atifs_to_tgsi.c b/src/mesa/state_tracker/st_atifs_to_tgsi.c index 2f2876b9a63..aaa7a4b79ec 100644 --- a/src/mesa/state_tracker/st_atifs_to_tgsi.c +++ b/src/mesa/state_tracker/st_atifs_to_tgsi.c @@ -548,7 +548,7 @@ st_init_atifs_prog(struct gl_context *ctx, struct gl_program *prog) {STATE_FOG_COLOR, 0, 0, 0, 0}; prog->info.inputs_read = 0; - prog->OutputsWritten = BITFIELD64_BIT(FRAG_RESULT_COLOR); + prog->info.outputs_written = BITFIELD64_BIT(FRAG_RESULT_COLOR); prog->SamplersUsed = 0; prog->Parameters = _mesa_new_parameter_list(); diff --git a/src/mesa/state_tracker/st_atom_rasterizer.c b/src/mesa/state_tracker/st_atom_rasterizer.c index a97a5ac5bc3..85030414a8e 100644 --- a/src/mesa/state_tracker/st_atom_rasterizer.c +++ b/src/mesa/state_tracker/st_atom_rasterizer.c @@ -195,7 +195,8 @@ static void update_raster_state( struct st_context *st ) */ if (vertProg) { if (vertProg->Id == 0) { - if (vertProg->OutputsWritten & BITFIELD64_BIT(VARYING_SLOT_PSIZ)) { + if (vertProg->info.outputs_written & + BITFIELD64_BIT(VARYING_SLOT_PSIZ)) { /* generated program which emits point size */ raster->point_size_per_vertex = TRUE; } @@ -216,7 +217,8 @@ static void update_raster_state( struct st_context *st ) last = ctx->VertexProgram._Current; if (last) raster->point_size_per_vertex = - !!(last->OutputsWritten & BITFIELD64_BIT(VARYING_SLOT_PSIZ)); + !!(last->info.outputs_written & + BITFIELD64_BIT(VARYING_SLOT_PSIZ)); } } if (!raster->point_size_per_vertex) { diff --git a/src/mesa/state_tracker/st_atom_shader.c b/src/mesa/state_tracker/st_atom_shader.c index b77000e38be..8c10ac91c5b 100644 --- a/src/mesa/state_tracker/st_atom_shader.c +++ b/src/mesa/state_tracker/st_atom_shader.c @@ -190,7 +190,7 @@ update_vp( struct st_context *st ) key.clamp_color = st->clamp_vert_color_in_shader && st->ctx->Light._ClampVertexColor && - (stvp->Base.OutputsWritten & + (stvp->Base.info.outputs_written & (VARYING_SLOT_COL0 | VARYING_SLOT_COL1 | VARYING_SLOT_BFC0 | diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index 98c80aa6b08..dba0e9c8bc4 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -6509,7 +6509,8 @@ get_mesa_program_tgsi(struct gl_context *ctx, prog->info.double_inputs_read, &prog->PatchInputsRead); shrink_array_declarations(v->outputs, v->num_outputs, - &prog->OutputsWritten, 0ULL, &prog->PatchOutputsWritten); + &prog->info.outputs_written, 0ULL, + &prog->PatchOutputsWritten); count_resources(v, prog); /* The GLSL IR won't be needed anymore. */ diff --git a/src/mesa/state_tracker/st_program.c b/src/mesa/state_tracker/st_program.c index 28b7bf6433e..b1ca0c6d6a2 100644 --- a/src/mesa/state_tracker/st_program.c +++ b/src/mesa/state_tracker/st_program.c @@ -269,7 +269,7 @@ st_translate_vertex_program(struct st_context *st, /* Compute mapping of vertex program outputs to slots. */ for (attr = 0; attr < VARYING_SLOT_MAX; attr++) { - if ((stvp->Base.OutputsWritten & BITFIELD64_BIT(attr)) == 0) { + if ((stvp->Base.info.outputs_written & BITFIELD64_BIT(attr)) == 0) { stvp->result_to_output[attr] = ~0; } else { @@ -754,7 +754,7 @@ st_translate_fragment_program(struct st_context *st, * Semantics and mapping for outputs */ { - GLbitfield64 outputsWritten = stfp->Base.OutputsWritten; + GLbitfield64 outputsWritten = stfp->Base.info.outputs_written; /* if z is written, emit that first */ if (outputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { @@ -1325,7 +1325,7 @@ st_translate_program_common(struct st_context *st, * mapping and the semantic information for each output. */ for (attr = 0; attr < VARYING_SLOT_MAX; attr++) { - if (prog->OutputsWritten & BITFIELD64_BIT(attr)) { + if (prog->info.outputs_written & BITFIELD64_BIT(attr)) { GLuint slot = num_outputs++; outputMapping[attr] = slot; diff --git a/src/mesa/swrast/s_context.c b/src/mesa/swrast/s_context.c index a8c2ea3d90a..9cb03b38c01 100644 --- a/src/mesa/swrast/s_context.c +++ b/src/mesa/swrast/s_context.c @@ -221,7 +221,8 @@ _swrast_update_deferred_texture(struct gl_context *ctx) else { GLboolean use_fprog = _swrast_use_fragment_program(ctx); const struct gl_program *fprog = ctx->FragmentProgram._Current; - if (use_fprog && (fprog->OutputsWritten & (1 << FRAG_RESULT_DEPTH))) { + if (use_fprog && + (fprog->info.outputs_written & (1 << FRAG_RESULT_DEPTH))) { /* Z comes from fragment program/shader */ swrast->_DeferredTexture = GL_FALSE; } diff --git a/src/mesa/swrast/s_fragprog.c b/src/mesa/swrast/s_fragprog.c index bb601db327c..9bd357d559f 100644 --- a/src/mesa/swrast/s_fragprog.c +++ b/src/mesa/swrast/s_fragprog.c @@ -204,7 +204,7 @@ run_program(struct gl_context *ctx, SWspan *span, GLuint start, GLuint end) { SWcontext *swrast = SWRAST_CONTEXT(ctx); const struct gl_program *program = ctx->FragmentProgram._Current; - const GLbitfield64 outputsWritten = program->OutputsWritten; + const GLbitfield64 outputsWritten = program->info.outputs_written; struct gl_program_machine *machine = &swrast->FragProgMachine; GLuint i; @@ -271,12 +271,12 @@ _swrast_exec_fragment_program( struct gl_context *ctx, SWspan *span ) run_program(ctx, span, 0, span->end); - if (program->OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_COLOR)) { + if (program->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_COLOR)) { span->interpMask &= ~SPAN_RGBA; span->arrayMask |= SPAN_RGBA; } - if (program->OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { + if (program->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { span->interpMask &= ~SPAN_Z; span->arrayMask |= SPAN_Z; } diff --git a/src/mesa/swrast/s_span.c b/src/mesa/swrast/s_span.c index 949c2303fd4..49fc580fb1d 100644 --- a/src/mesa/swrast/s_span.c +++ b/src/mesa/swrast/s_span.c @@ -1313,7 +1313,7 @@ _swrast_write_rgba_span( struct gl_context *ctx, SWspan *span) const struct gl_program *fp = ctx->FragmentProgram._Current; const GLboolean multiFragOutputs = _swrast_use_fragment_program(ctx) - && fp->OutputsWritten >= (1 << FRAG_RESULT_DATA0); + && fp->info.outputs_written >= (1 << FRAG_RESULT_DATA0); /* Save srcColorType because convert_color_type() can change it */ const GLenum srcColorType = span->array->ChanType; GLuint buf; diff --git a/src/mesa/tnl/t_context.c b/src/mesa/tnl/t_context.c index 0319e855872..ec18fa01b2e 100644 --- a/src/mesa/tnl/t_context.c +++ b/src/mesa/tnl/t_context.c @@ -183,7 +183,8 @@ _tnl_InvalidateState( struct gl_context *ctx, GLuint new_state ) if (vp) { GLuint i; for (i = 0; i < MAX_VARYING; i++) { - if (vp->OutputsWritten & BITFIELD64_BIT(VARYING_SLOT_VAR0 + i)) { + if (vp->info.outputs_written & + BITFIELD64_BIT(VARYING_SLOT_VAR0 + i)) { tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_GENERIC(i)); } } diff --git a/src/mesa/tnl/t_vb_program.c b/src/mesa/tnl/t_vb_program.c index 1ed087c0fee..695821a1b41 100644 --- a/src/mesa/tnl/t_vb_program.c +++ b/src/mesa/tnl/t_vb_program.c @@ -304,7 +304,7 @@ run_vp( struct gl_context *ctx, struct tnl_pipeline_stage *stage ) /* make list of outputs to save some time below */ numOutputs = 0; for (i = 0; i < VARYING_SLOT_MAX; i++) { - if (program->OutputsWritten & BITFIELD64_BIT(i)) { + if (program->info.outputs_written & BITFIELD64_BIT(i)) { outputs[numOutputs++] = i; } } @@ -378,7 +378,7 @@ run_vp( struct gl_context *ctx, struct tnl_pipeline_stage *stage ) } /* FOGC is a special case. Fragment shader expects (f,0,0,1) */ - if (program->OutputsWritten & BITFIELD64_BIT(VARYING_SLOT_FOGC)) { + if (program->info.outputs_written & BITFIELD64_BIT(VARYING_SLOT_FOGC)) { store->results[VARYING_SLOT_FOGC].data[i][1] = 0.0; store->results[VARYING_SLOT_FOGC].data[i][2] = 0.0; store->results[VARYING_SLOT_FOGC].data[i][3] = 1.0; @@ -443,7 +443,8 @@ run_vp( struct gl_context *ctx, struct tnl_pipeline_stage *stage ) } for (i = 0; i < ctx->Const.MaxVarying; i++) { - if (program->OutputsWritten & BITFIELD64_BIT(VARYING_SLOT_VAR0 + i)) { + if (program->info.outputs_written & + BITFIELD64_BIT(VARYING_SLOT_VAR0 + i)) { /* Note: varying results get put into the generic attributes */ VB->AttribPtr[VERT_ATTRIB_GENERIC0+i] = &store->results[VARYING_SLOT_VAR0 + i]; -- 2.30.2