From 53490d7f8b3f6cb3494bfe954cee34cb82ce54ac Mon Sep 17 00:00:00 2001 From: lkcl Date: Fri, 14 Jun 2019 14:40:06 +0100 Subject: [PATCH] --- isa_conflict_resolution/isamux_isans.mdwn | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/isa_conflict_resolution/isamux_isans.mdwn b/isa_conflict_resolution/isamux_isans.mdwn index 74c8b7628..776ef5743 100644 --- a/isa_conflict_resolution/isamux_isans.mdwn +++ b/isa_conflict_resolution/isamux_isans.mdwn @@ -6,7 +6,7 @@ opcode length to 16+N, 32+N, 48+N, where N is a hard fixed quantity on a per-implementor basis. Where the opcode is normally loaded from the location at the PC, the extra -bits are instead set via a CSR and mandatorially appended to every instruction: hence why they are described as "hidden" opcode bits, and as a "namespace". +bits, set via a CSR, are mandatorially appended to every instruction: hence why they are described as "hidden" opcode bits, and as a "namespace". The parallels with c++ "using namespace" are direct and clear. @@ -18,11 +18,11 @@ needs to be paid to the fact that there is an "immediate" version of CSRRW 
-      3                   2                   1
-   |1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0|
-   |------------------------------ |-------|---------------------|-|
-   |reserved reserved reserved reserved reserved   | foreignarch |1|
-   |custom         | reserved    |           official|B| rvcpage |0|
+   3                   2                   1
+|1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0|
+|------------------------------ |-------|---------------------|-|
+|reserved reserved reserved reserved reserved   | foreignarch |1|
+|custom         | reserved    |           official|B| rvcpage |0|
-- 2.30.2