From 5374de8d0c9dd3c236092d7ae5eb6cc7fdc5e4cf Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 28 Nov 2021 22:52:43 +0000 Subject: [PATCH] --- docs/pinmux.mdwn | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/docs/pinmux.mdwn b/docs/pinmux.mdwn index 133d8d51d..00a12297f 100644 --- a/docs/pinmux.mdwn +++ b/docs/pinmux.mdwn @@ -218,6 +218,22 @@ and triaging of faults. +## C4M JTAG TAP + +Staf Verhaegen's Chips4Makers JTAG TAP module includes everything +needed to create JTAG Boundary Scan Shift Registers. However, +connecting up cores (a hardware term: the equivalent software +term is "peripherals") on one side and the pads on the other is +especially confusing, but deceptively simple. The actual addition +to the Scan Shift Register is this straightforward: + + class JTAG(DMITAP, Pins): + def __init__(self, pinset, domain, wb_data_wid=32): + TAP.__init__(self, ir_width=4) + tx = self.add_io(iotype=IOTypeOut, name="uart_tx") + rx = self.add_io(iotype=IOTypeIn, name="uart_rx") + + ## Clock synchronisation Take for example USB ULPI: -- 2.30.2