From 53eadea55d0c9adc6a20f2587d6dcf622bda5396 Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Mon, 4 Feb 2019 12:11:03 +0000 Subject: [PATCH] configs: Unifiy interpretation of Realview mem_regions In every arm platform which is making use of them, mem_regions are interpreted as a pair of start address and size. However arm SimpleSystem, which is using VExpress_GEM5_V1, is interpreting them as start address and end address. This patch is fixing this mismatch. Change-Id: I0b2a2193cd07fbc5430f233438269a9c7c353df9 Signed-off-by: Giacomo Travaglini Reviewed-by: Ciro Santilli Reviewed-on: https://gem5-review.googlesource.com/c/16205 Reviewed-by: Andreas Sandberg Maintainer: Andreas Sandberg --- configs/example/arm/devices.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/example/arm/devices.py b/configs/example/arm/devices.py index 15492cb9b..e2c8be8af 100644 --- a/configs/example/arm/devices.py +++ b/configs/example/arm/devices.py @@ -207,8 +207,8 @@ class SimpleSystem(LinuxArmSystem): self.iobridge = Bridge(delay='50ns') # Device DMA -> MEM mem_range = self.realview._mem_regions[0] - mem_range_size = long(mem_range[1]) - long(mem_range[0]) - assert mem_range_size >= long(Addr(mem_size)) + max_size = long(mem_range[1]) + assert max_size >= long(Addr(mem_size)) self.mem_ranges = [ AddrRange(start=mem_range[0], size=mem_size) ] self._caches = caches if self._caches: -- 2.30.2