From 540523b8962ed59ed4a71640e2365e6dc0660478 Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 11 Apr 2022 10:24:01 +0100 Subject: [PATCH] --- openpower/sv/svp64/appendix.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn index 11e9d58e4..e9a670218 100644 --- a/openpower/sv/svp64/appendix.mdwn +++ b/openpower/sv/svp64/appendix.mdwn @@ -709,7 +709,7 @@ so FP instructions with Rc=1 write to CR1 (n=1). CRs are not stored in SPRs: they are registers in their own right. Therefore context-switching the full set of CRs involves a Vectorised -mfcr or mtcr, using VL=64, elwidth=8 to do so. This is exactly as how +mfcr or mtcr, using VL=8 to do so. This is exactly as how scalar OpenPOWER context-switches CRs: it is just that there are now more of them. -- 2.30.2