From 5496abe1c5c31aa6648e8fdb15e4122025bcabfe Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Sun, 12 Jan 2020 20:16:22 +1030 Subject: [PATCH] tic4x: sign extension using shifts Don't do that. Especially don't use shift counts that assume the type being shifted is 32 bits when the type is long/unsigned long. Also reverts part of a change I made on 2019-12-11 to tic4x_print_register that on closer inspection turns out to be unnecessary. include/ * opcode/tic4x.h (EXTR): Delete. (EXTRU, EXTRS, INSERTU, INSERTS): Rewrite without zero/sign extension using shifts. Do trim INSERTU value to specified bitfield. opcodes/ * tic4x-dis.c (tic4x_print_register): Remove dead code. gas/ * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap insertion. --- gas/ChangeLog | 5 +++++ gas/config/tc-tic4x.c | 2 +- include/ChangeLog | 6 ++++++ include/opcode/tic4x.h | 12 +++++++----- opcodes/ChangeLog | 4 ++++ opcodes/tic4x-dis.c | 3 +-- 6 files changed, 24 insertions(+), 8 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index 245bd743634..4186fbd05e3 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2020-01-13 Alan Modra + + * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap + insertion. + 2020-01-10 Alan Modra * testsuite/gas/elf/pr14891.s: Don't start directives in first column. diff --git a/gas/config/tc-tic4x.c b/gas/config/tc-tic4x.c index 913120d9aba..cc477b62bbc 100644 --- a/gas/config/tc-tic4x.c +++ b/gas/config/tc-tic4x.c @@ -2193,7 +2193,7 @@ tic4x_operands_match (tic4x_inst_t *inst, tic4x_insn_t *tinsn, int check) } else if (exp->X_add_number < 32 && IS_CPU_TIC3X (tic4x_cpu)) { - INSERTU (opcode, exp->X_add_number | 0x20, 4, 0); + INSERTU (opcode, exp->X_add_number | 0x20, 5, 0); continue; } else diff --git a/include/ChangeLog b/include/ChangeLog index 91765c5be61..3e2cdcaeb48 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,9 @@ +2020-01-13 Alan Modra + + * opcode/tic4x.h (EXTR): Delete. + (EXTRU, EXTRS, INSERTU, INSERTS): Rewrite without zero/sign + extension using shifts. Do trim INSERTU value to specified bitfield. + 2020-01-10 Alan Modra * opcode/spu.h: Formatting. diff --git a/include/opcode/tic4x.h b/include/opcode/tic4x.h index 66b4ebfd082..04e3f0853d2 100644 --- a/include/opcode/tic4x.h +++ b/include/opcode/tic4x.h @@ -23,11 +23,13 @@ #define IS_CPU_TIC4X(v) ((v) == 0 || (v) == 40 || (v) == 44) /* Define some bitfield extraction/insertion macros. */ -#define EXTR(inst, m, l) ((inst) << (31 - (m)) >> (31 - ((m) - (l)))) -#define EXTRU(inst, m, l) EXTR ((unsigned long)(inst), (m), (l)) -#define EXTRS(inst, m, l) EXTR ((long)(inst), (m), (l)) -#define INSERTU(inst, val, m, l) (inst |= ((val) << (l))) -#define INSERTS(inst, val, m, l) INSERTU (inst, ((val) & ((1 << ((m) - (l) + 1)) - 1)), m, l) +#define EXTRU(inst, m, l) \ + (((inst) >> (l)) & ((2u << ((m) - (l))) - 1)) +#define EXTRS(inst, m, l) \ + ((int) ((EXTRU (inst, m, l) ^ (1u << ((m) - (l)))) - (1u << ((m) - (l))))) +#define INSERTU(inst, val, m, l) \ + ((inst) |= ((val) & ((2u << ((m) - (l))) - 1)) << (l)) +#define INSERTS INSERTU /* Define register numbers. */ typedef enum diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index feeb7c55357..26d1e6c4a2c 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2020-01-13 Alan Modra + + * tic4x-dis.c (tic4x_print_register): Remove dead code. + 2020-01-13 Alan Modra * fr30-ibld.c: Regenerate. diff --git a/opcodes/tic4x-dis.c b/opcodes/tic4x-dis.c index 1d7946918b7..34e270b7138 100644 --- a/opcodes/tic4x-dis.c +++ b/opcodes/tic4x-dis.c @@ -148,8 +148,7 @@ tic4x_print_register (struct disassemble_info *info, unsigned long regno) = (tic4x_register_t *)(tic4x_registers + i); } } - if (regno > (IS_CPU_TIC4X (tic4x_version) ? TIC4X_REG_MAX : TIC3X_REG_MAX) - || registertable[regno] == NULL) + if (regno > (IS_CPU_TIC4X (tic4x_version) ? TIC4X_REG_MAX : TIC3X_REG_MAX)) return 0; if (info != NULL) (*info->fprintf_func) (info->stream, "%s", registertable[regno]->name); -- 2.30.2