From 549d0aeee4e8f0a5be4a29ea7f6c2d11e649c221 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 25 Jun 2019 09:29:19 +0200 Subject: [PATCH] radv/gfx10: implement si_set_mutable_tex_desc_fields() Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_image.c | 33 ++++++++++++++++++++++++++++++--- 1 file changed, 30 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index cad564f5835..644e3f0a0f9 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -471,12 +471,39 @@ si_set_mutable_tex_desc_fields(struct radv_device *device, if (meta_va) { state[6] |= S_008F28_COMPRESSION_EN(1); - state[7] = meta_va >> 8; - state[7] |= plane->surface.tile_swizzle; + if (chip_class <= GFX9) { + state[7] = meta_va >> 8; + state[7] |= plane->surface.tile_swizzle; + } } } - if (chip_class >= GFX9) { + if (chip_class >= GFX10) { + state[3] &= C_00A00C_SW_MODE; + + if (is_stencil) { + state[3] |= S_00A00C_SW_MODE(plane->surface.u.gfx9.stencil.swizzle_mode); + } else { + state[3] |= S_00A00C_SW_MODE(plane->surface.u.gfx9.surf.swizzle_mode); + } + + state[6] &= C_00A018_META_DATA_ADDRESS_LO & + C_00A018_META_PIPE_ALIGNED; + + if (meta_va) { + struct gfx9_surf_meta_flags meta; + + if (image->dcc_offset) + meta = plane->surface.u.gfx9.dcc; + else + meta = plane->surface.u.gfx9.htile; + + state[6] |= S_00A018_META_PIPE_ALIGNED(meta.pipe_aligned) | + S_00A018_META_DATA_ADDRESS_LO(meta_va >> 8); + } + + state[7] = meta_va >> 16; + } else if (chip_class >= GFX9) { state[3] &= C_008F1C_SW_MODE; state[4] &= C_008F20_PITCH; -- 2.30.2