From 54ce9cc22770a28a7381f56c959c02e28f7b9a05 Mon Sep 17 00:00:00 2001 From: Nathan Froyd Date: Wed, 30 Jul 2008 15:30:59 +0000 Subject: [PATCH] re PR target/35866 (Vector load/store from a packed struct does not work (without -mstrict-align)) PR target/35866 * config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Add clause for vector modes. From-SVN: r138316 --- gcc/ChangeLog | 7 +++++++ gcc/config/rs6000/rs6000.h | 5 ++++- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 423ac34d678..4b8f2d6bb8b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2008-07-30 Nathan Froyd + + PR target/35866 + + * config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Add clause for + vector modes. + 2008-07-30 Rafael Avila de Espindola * final.c (call_from_call_insn): New. diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 8a926e43c44..def3b53ab95 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -644,12 +644,15 @@ extern enum rs6000_nop_insertion rs6000_sched_insert_nops; /* Define this macro to be the value 1 if unaligned accesses have a cost many times greater than aligned accesses, for example if they are emulated in a trap handler. */ +/* Altivec vector memory instructions simply ignore the low bits; SPE + vector memory instructions trap on unaligned accesses. */ #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) \ (STRICT_ALIGNMENT \ || (((MODE) == SFmode || (MODE) == DFmode || (MODE) == TFmode \ || (MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode \ || (MODE) == DImode) \ - && (ALIGN) < 32)) + && (ALIGN) < 32) \ + || (VECTOR_MODE_P ((MODE)) && (ALIGN) < GET_MODE_BITSIZE ((MODE)))) /* Standard register usage. */ -- 2.30.2